SCD1284 INTEL [Intel Corporation], SCD1284 Datasheet - Page 47

• Manufacturer Part Number: SCD1284
• Description: IEEE 1284-Compatible Parallel Interface Controller with Two High-Speed Asynchronous Serial Ports
• Manufacturer: INTEL [Intel Corporation]

Figure 7. Interrupt Generation Logic (Continued)
Datasheet
PPort
(PIR[6])
(PFSR[0])
(DMAACK* w/o
DataErr
(write to non-
empty HR1)
DMAREQ*)
DMAwrerr
HR1wrerr
(DER[7])
(DER[3])
(PFSR[1])
OneChar
Pipeline
(PIR[5])
DMArderr (DER[6])
(DMAACK* w/o
empty HR1))
DMAREQ*)
(Read from
HR1rderr
(DER[2])
(PFSR[5])
Timeout
(write to non-empty
IEEE 1284-Compatible Parallel Interface Controller — CD1284
Bufwrerr (DER[5])
(Write to non-
empty HR2)
DMABUF)
HR2wrerr
(DER[1])
Stale (PFSR[3]) transitions from false to true
and:
DMA is disabled.
DMA is enabled, but DMABUF is empty (else, a
DMAREQ* is generated, then a timeout interrupt
is generated when the DMABUF is empty and all
DMA cycles are complete.
empty HR2)
(Read from
(Read from empty
Bufrderr (DER[4])
HR2rderr
(DER[0])
DMABUF)
Interface in forward direction,
PFHR2 full, PFHR1 empty, and
Timeout (PFSR[5]) is set.
(PFCR[1])
(PFCR[4])
ErrEn
IntEn
SRP
(SVRR[3])
DataErr
(PFSR[0])
OneChar
(PFSR[1])
Timeout
(PFSR[5])
Pipeline
(PIR[5])
PPireq
(PIR[7])
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