EDD1232ACBH ELPIDA [Elpida Memory], EDD1232ACBH Datasheet - Page 6

• Manufacturer Part Number: EDD1232ACBH
• Description: 128M bits DDR SDRAM
• Manufacturer: ELPIDA [Elpida Memory]

DC Characteristics 1 (TA = 0 C to +70 C, VDD, VDDQ = 2.5V 0.125V/+0.2V, VSS, VSSQ = 0V)
Parameter
Operating current (ACT-PRE) IDD0
Operating current
(ACT-READ-PRE)
Idle power down standby
current
Floating idle standby current IDD2F or 2N
Quiet idle standby current
Active power down standby
current
Active standby current
Operating current
(Burst read operation)
Operating current
(Burst write operation)
Auto Refresh current
Self refresh current
Operating current
(4 banks interleaving)
Notes: 1. These IDD data are measured under condition that DQ pins are not connected.
DC Characteristics 2 (TA = 0 C to +70 C, VDD, VDDQ = 2.5V 0.125V/+0.2V, VSS, VSSQ = 0V)
Parameter
Input leakage current
Output leakage current
Data Sheet E1202E20 (Ver.2.0)
2. One bank operation.
3. One bank active.
4. All banks idle.
5. Command/Address transition once per one clock cycle.
6. DQ, DM and DQS transition twice per one clock cycle.
7. 4 banks active. Only one bank is running at tRC = tRC (min.)
8. The IDD data on this table are measured with regard to tCK = tCK (min.) in general.
9. Command/Address transition once every two clock cycle.
10. Command/Address stable at ≥ VIH or ≤ VIL.
Symbol
IDD1
IDD2P
IDD2Q
IDD3P
IDD3N
IDD4R
IDD4W
IDD5
IDD6
IDD7A
Symbol
ILI
ILO
min.
–2
–5
Grade
max.
2
5
max.
100
135
15
30
25
30
80
200
200
130
7
300
6
mA
mA
mA
mA
mA
mA
mA
Unit
µA
µA
Unit
mA
mA
mA
mA
mA
Test condition
CKE ≥ VIH,
tRC = tRC (min.)
CKE ≥ VIH, BL = 4,CL = 3,
tRC = tRC (min.)
CKE ≤ VIL
CKE ≥ VIH, /CS ≥ VIH
DQ, DQS, DM = VREF
CKE ≥ VIH, /CS ≥ VIH
DQ, DQS, DM = VREF
CKE ≤ VIL
CKE ≥ VIH, /CS ≥ VIH
tRAS = tRAS (max.)
CKE ≥ VIH, BL = 2, CL = 3
CKE ≥ VIH, BL = 2,CL = 3
tRFC = tRFC (min.),
Input ≤ VIL or ≥ VIH
Input ≥ VDD – 0.2 V
Input ≤ 0.2 V
BL = 4
VDDQ ≥ VOUT ≥ VSS
Test condition
VDD ≥ VIN ≥ VSS
EDD1232ACBH
Notes
1, 2, 9
1, 2, 5
4
4, 5
4, 10
3
3, 5, 6
1, 2, 5, 6
1, 2, 5, 6
1, 5, 6, 7
Notes