HM17CM256 HYNIX [Hynix Semiconductor], HM17CM256 Datasheet - Page 11

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HM17CM256

Manufacturer Part Number
HM17CM256
Description
128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet

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PIN DESCRIPTION 2
50,51,52,53
54,55,56,57
47,48,49
No.
42
43
44
45
46
25
26
38
37
D
D
12
D
8
WR (R/W)
D
D
,D
D
,D
3
D
D
RD (E)
NAME
/SMODE
4
2
5
1
9
0
/EXCS
/SPOL
13
,D
CS
RS
/SDA
/SCL
,D
,D
6
10
,D
14
,D
7
,D
11
15
,
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
SDA : serial data input pin
SCL : data transfer clock
EXCS : extension chip selection I/O pin
SMODE : serial transfer mode setting input pin
SPOL : RS polarity selection pin when 3 line serial interface is
selected.
Chip selection pin.
Input data selection pin.
<80 series CPU interface (P/S=”H”,SEL68=”L”)>
<68 series CPU interface (P/S=”H”,SEL68=”H”)>
<80 series CPU interface (P/S=”H”,SEL68=”L”)>
<68 series CPU interface (P/S=”H”,SEL68=”H”)>
SDA data is shifted at the rising edge of SCL
Internal serial/parallel conversion into 8-bit data occurs at the
rising edge of 8
Set to “L” after data transfer or during non-access time
Connect to data bus to MPU with 8bit bi-directional bus.
Used as MSB 8bit data bus in the 16bit data RAM transfer
mode
Set to “L” or “H” when not used.
Data in-out is possible when CS = “L”.
Distinguish bus data from CPU whether instruction or display
data.
RD signal connection port of 80 series CPU.
Data bus goes to output state at RD = “L”.
Enable signal connection port of 68 series CPU.
Active status when this signal is at “H”.
WR signal connection port of 80 series CPU.
Active at “L” and data bus signal is taken at the rising edge
of WR.
series MPU.
Read write control signal , R/W connection port of 68-
When parallel interface is selected (P/S=”H”), data line is
connected to MPU data bus with 8bit bi-directional bus
When serial interface is selected (P/S=”L”),
D
and various sets are taken by serial interface use mode of
D
0
2
, D
class
and D
RS
status
R/W
3
, D
4
1
.
(SCL, SDA) are used as serial interface pins
th
clock of SCL.
instruction
read
FUNCTION
H
H
write
HM17CM256
L
display data
L
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