HM17CM256 HYNIX [Hynix Semiconductor], HM17CM256 Datasheet - Page 60

• Manufacturer Part Number: HM17CM256
• Description: 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
• Manufacturer: HYNIX [Hynix Semiconductor]

HM17CM256
- 60 -
(34-10) Power control register set
a) ACL command
b) DCON command
c) HALT command
d) AMPON command
( reset :{AMPON, HALT, DCON, ACL}=0
CS
0
goes on internally, D
from internal oscillator or from external resistor oscillation mode ).
beginning.
needed.
activated stably.
not activated stably, wrong display can be appeared.
voltage converting circuit ).
This command initializes internal circuit and it is valid only at master operating.
Just after the execution of ACL command (ACL=”1”), D
When ACL command is executed, internal reset signal is produced by using local display clock ( clock
So, after ACL command is executed, it needs to WAIT at least 2 period of the clock for next process
ACL command is effective only at master mode operation because it uses original oscillator clock.
It is prohibited for slave mode operation to use the internal oscillator or external oscillator.
So, ACL command is impossible at slave mode. Please reset the slave device at RES terminal, when
ON/OFF the internal voltage boosting circuit.
Power save mode ON/OFF control
The power consumption is decreased near static current at power save mode.
States of each sub-block in power save mode are as follow.
Make display OFF state before power save mode by HALT command.
And when returning from power save mode, you should display ON after oscillator, power circuit is
After display OFF and HALT command, if the display is turned ON before oscillator and power circuit is
ON/OFF the internal OP. amplifier circuit of power block (voltage regulator block, electric volume,
RS
1
Oscillator, built-in power supply block stop.
Stop driving LCD panel, segment drive, the outputs of common driver are all set to V
Clock input from OSC
Display RAM data are conserved.
Operational modes are preserved as those before power save command was executed.
V
LCD
ACL=”0”: normal state
ACL=”1”: initialization ON
DCON=”0”: boosting circuit OFF
DCON=”1”: boosting circuit ON
HALT=”0”: normal state
HALT=”1”: power save state
AMPON=”0”: internal power circuit OP. Amplifier OFF
AMPON=”1”: internal power circuit OP. Amplifier ON
, V
RD
1
1
~ V
WR
4
0
become high impedance state.
0
is reset to “0”.
RE
0
2
1
port is disabled.
RE
0
1
H
RE
0
read address :B
0
D
1
7
0
D
H
0
bit is set to 1.
6
)
D
1
5
D
1
4
But as the initialization process
AMPON
D
3
HALT
D
2
DCON
D
SS
1
level.
ACL
D
0