HM17CM256 HYNIX [Hynix Semiconductor], HM17CM256 Datasheet - Page 96

• Manufacturer Part Number: HM17CM256
• Description: 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
• Manufacturer: HYNIX [Hynix Semiconductor]

HM17CM256
- 96 -
Applied port (* Remark Solves)
*1
*2
*3
*4
*5
*6
*7
*8
*9
*10 oscillator frequency when internal oscillator circuit is used ( BW display mode).
*11 V
*12 applicable under internal oscillator circuit and internal power circuit are ON state and no access from
*13 V
*14 V
D
D
CL, FLM, FR, CLK ports
CS, RS, M/S, SEL68, RD, WR, P/S, RES, OSC
applicable at D
SEGA
resistance when being supplied 0.5V between each output ports and power port (V
applicable under bias ratio = 1/9
V
V
oscillator frequency when internal oscillator circuit is used ( gradation display mode).
applicable under Rf register of oscillator circuit, {Rf
oscillator frequency when internal oscillator circuit is used ( fixed gradation display mode).
applicable under Rf register of oscillator circuit, {Rf
applicable under Rf register of oscillator circuit, {Rf
N x boosting (N=2~7). applicable under internal oscillator circuit and internal power circuit are ON state
V
bias = 1/5~1/10, 1/82 duty, no load at LCD driver port.
RL = 30k (between V
CPU.
electric volume is “1111111”.
Display is all ON and cross check pattern display ( variable gradation display mode), and no load at LCD
driver port.
Test condition :
V
Cross hatch state and no load at LCD driver port.
Boosting coefficient N is 2~7 times
Test condition : CA
DD
DD
OUT
EE
REG
REG
EE
0
0
~D
~D
= 2.4~3.3V, V
= 2.4~3.3V, electric volume is MAX(“1111111”).
ports
current when source clock is stopped, chip selection (CS=V
output voltage when V
15
15
0
port
, CS, RS, M/S, RD, WR, P/S, SEL68, CLK, CL, FLM, FR, RES ports
~SEGA
port
ports
127
0
~D
REF
, SEGB
15
1/82 duty.
= 0.9 V
V
, CL, FLM, FR, CLK = high impedance state
1
=CA
DD
OUT
=V
0
~SEGB
,V
2
EE
=1.0 F, CA
EE
BA
SS
=V
, bias= 1/5~1/10, 1/82 duty, electric volume is “1111111”
), CA
output is connected to V
REF
127
,
1
, SEGC
= CA
CA
3
=0.1 F, DCON=“1”, AMPON=“1”, NLIN=”0”
1
2
=CA
=1.0 F, CA
0
~SEGC
2
=1.0 F, CA
1
ports
127
2
2
2
3
, Rf
, Rf
, Rf
=0.1 F, DCON=“1”, AMPON=“1”
, COM
REF
1
1
1
, Rf
, Rf
, Rf
input, V
3
=0.1 F, DCON=“1”, AMPON=“1”, NLIN=”0”,
0
0
0
0
~COM
} = “000”
} = “000”
} = “000”
DD
REG
) is non-selection state and no load.
79
gain is N=1.
, COMI
0
, COMI
LCD,
1
V
ports
1,
V
2,
V
3,
V
4
)