HM17CM256 HYNIX [Hynix Semiconductor], HM17CM256 Datasheet - Page 30

• Manufacturer Part Number: HM17CM256
• Description: 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
• Manufacturer: HYNIX [Hynix Semiconductor]

GLSB circuit
CPU access data
X address :n
HM17CM256
Display RAM data
Gradation palette
- 30 -
the status of SWAP register and REF register, the same method as 8 bit access
notice) internal access X address :n
notice) internal access X address :n
0
When display RAM is accessed by 16 bit data width, the weight of each data bit is dependent on
Graydation
control ciruit
ACCESS when (REF, SWAP)=(0, 0) or (1, 1)
ACCESS when (REF, SWAP)=(0, 1) or (1, 0)
H
Palette Aj
D
SEGAi
0
0
0
MSB LSB
D
0
0
1
MSB
D
1
0
0
D
Palette Cj
1
1
2
Palette Bj
SEGAi
SEGBi
D
1
0
D
1
0
0
3
LSB MSB
D
MSB LSB
D
1
1
2
0
0
4
D
:3F
0
0
:3F
D
3
Palette Bj
1
1
5
H
SEGBi
H
Palette Cj
~3F
~3F
H
H
SEGCi
D
~n
~n
D
0
0
4
1
1
6
H
H
H
H
LSB MSB
D
(access when REF=”0”)
(access when REF=”1”)
(access when REF=”0”)
(access when REF=”1”)
MSB
D
1
1
5
1
1
7
Palette Aj
D
SEGCi
Palette Aj
SEGAi+1
0
1
D
6
0
0
8
D
MSB
0
1
7
D
0
0
9
MSB
D
LSB
D
1
0
8
Palette Cj
10
1
1
SEGAi+1
Palette Bj
SEGBi+1
D
D
1
0
0
9
0
11
LSB
D
MSB
D
1
1
10
0
0
12
MSB
D
0
LSB
D
0
11
SEGBi+1
1
1
Palette Bj
13
Palette Cj
SEGCi+1
D
D
0
0
12
1
1
14
LSB MSB
D
D
MSB
1
1
13
15
1
1
SEGCi+1
D
Palette Aj
0
1
14
Gradation
control ciruit
i=0~126
Gradation palette
Display RAM data
CPU access data
X address :n
j=0~7
D
15
0
1
GLSB circuit
i=0~126
j=0~7
H
0