DM9000_09 DAVICOM [Davicom Semiconductor, Inc.], DM9000_09 Datasheet - Page 12

no-image

DM9000_09

Manufacturer Part Number
DM9000_09
Description
ISA to Ethernet MAC Controller with Integrated 10/100 PHY
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet
Key to Default
In the register description that follows, the default column
takes the form:
<Reset Value>, <Access Type>
Where:
<Reset Value>:
<Access Type>:
RO = Read only
RW = Read/Write
R/C = Read and Clear
RW/C1=Read/Write and Cleared by write 1
WO = Write only
Reserved bits are shaded and should be written with 0.
Reserved bits are undefined on read access.
Final
Version: DM9000-DS-F03
April 23, 2009
1
0
X
MWRH
TXPLH
TXPLL
IMR
ISR
Bit set to logic one
Bit set to logic zero
No default value
Memory Data Write _ address Register High Byte
TX Packet Length Low Byte Register
TX Packet Length High Byte Register
Interrupt Status Register
Interrupt Mask Register
ISA to Ethernet MAC Controller with Integrated 10/100 PHY
FBH
FCH
FDH
FEH
FFH
00H
XXH
XXH
00H
00H
DM9000
12

Related parts for DM9000_09