MT48H32M32LFB5-6 IT:B Micron, MT48H32M32LFB5-6 IT:B Datasheet - Page 27
MT48H32M32LFB5-6 IT:B
Manufacturer Part Number
MT48H32M32LFB5-6 IT:B
Description
Manufacturer
Micron
Datasheet
1.MT48H32M32LFB5-6_ITB.pdf
(81 pages)
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PRECHARGE
Figure 9: PRECHARGE Command
BURST TERMINATE
AUTO REFRESH
PDF: 09005aef8404b23d
y68m_mobile_lpsdr.pdf – Rev. D 1/11 EN
The PRECHARGE command is used to deactivate the open row in a particular bank or
the open row in all banks. The bank(s) will be available for a subsequent row access a
specified time (
whether one or all banks are to be precharged, and in the case where only one bank is
precharged, inputs BA0 and BA1 select the bank. Otherwise BA0 and BA1 are treated as
“Don’t Care.” After a bank has been precharged, it is in the idle state and must be acti-
vated prior to any READ or WRITE commands are issued to that bank.
BA0, BA1
The BURST TERMINATE command is used to truncate either fixed-length or continu-
ous page bursts. The most recently registered READ or WRITE command prior to the
BURST TERMINATE command is truncated.
AUTO REFRESH is used during normal operation and is analogous to CAS#-BEFORE-
RAS# (CBR) REFRESH in FPM/EDO DRAM. Addressing is generated by the internal re-
fresh controller. This makes the address bits “Don’t Care” during an AUTO REFRESH
command.
Address
RAS#
CAS#
WE#
CKE
A10
CLK
CS#
HIGH
t
RP) after the PRECHARGE command is issued. Input A10 determines
Valid address
Bank address
Bank selected
All banks
27
Don’t Care
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1Gb: x32 Mobile LPSDR SDRAM
© 2010 Micron Technology, Inc. All rights reserved.
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