MT48H32M32LFB5-6 IT:B Micron, MT48H32M32LFB5-6 IT:B Datasheet - Page 77
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MT48H32M32LFB5-6 IT:B
Manufacturer Part Number
MT48H32M32LFB5-6 IT:B
Description
Manufacturer
Micron
Datasheet
1.MT48H32M32LFB5-6_ITB.pdf
(81 pages)
- Current page: 77 of 81
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Deep Power-Down
PDF: 09005aef8404b23d
y68m_mobile_lpsdr.pdf – Rev. D 1/11 EN
Deep power-down mode is a maximum power-saving feature achieved by shutting off
the power to the entire device memory array. Data on the memory array will not be re-
tained after deep power-down mode is executed. Deep power-down mode is entered by
having all banks idle, with CS# and WE# held LOW with RAS# and CAS# HIGH at the
rising edge of the clock, while CKE is LOW. CKE must be held LOW during deep power-
down.
To exit deep power-down mode, CKE must be asserted HIGH. Upon exiting deep power-
down mode, a full initialization sequence is required.
77
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1Gb: x32 Mobile LPSDR SDRAM
© 2010 Micron Technology, Inc. All rights reserved.
Deep Power-Down
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