MT48H32M32LFB5-6 IT:B Micron, MT48H32M32LFB5-6 IT:B Datasheet - Page 4

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MT48H32M32LFB5-6 IT:B

Manufacturer Part Number
MT48H32M32LFB5-6 IT:B
Description
Manufacturer
Micron
Datasheet
1Gb: x32 Mobile LPSDR SDRAM
Features
List of Figures
Figure 1: 1Gb Mobile LPSDR Part Numbering ................................................................................................... 2
Figure 2: Functional Block Diagram ................................................................................................................. 7
Figure 3: 90-Ball VFBGA (Top View) ................................................................................................................. 8
Figure 4: 90-Ball VFBGA (8mm x 13mm) ......................................................................................................... 10
Figure 5: Typical Self Refresh Current vs. Temperature .................................................................................... 15
Figure 6: ACTIVE Command .......................................................................................................................... 24
Figure 7: READ Command ............................................................................................................................. 25
Figure 8: WRITE Command ........................................................................................................................... 26
Figure 9: PRECHARGE Command .................................................................................................................. 27
Figure 10: Initialize and Load Mode Register .................................................................................................. 35
Figure 11: Mode Register Definition ............................................................................................................... 36
Figure 12: CAS Latency .................................................................................................................................. 39
Figure 13: Extended Mode Register Definition ................................................................................................ 40
t
t
t
Figure 14: Example: Meeting
RCD (MIN) When 2 <
RCD (MIN)/
CK < 3 .......................................................... 42
Figure 15: Consecutive READ Bursts .............................................................................................................. 44
Figure 16: Random READ Accesses ................................................................................................................ 45
Figure 17: READ-to-WRITE ............................................................................................................................ 46
Figure 18: READ-to-WRITE With Extra Clock Cycle ......................................................................................... 47
Figure 19: READ-to-PRECHARGE .................................................................................................................. 47
Figure 20: Terminating a READ Burst ............................................................................................................. 48
Figure 21: Alternating Bank Read Accesses ..................................................................................................... 49
Figure 22: READ Continuous Page Burst ......................................................................................................... 50
Figure 23: READ – DQM Operation ................................................................................................................ 51
Figure 24: WRITE Burst ................................................................................................................................. 52
Figure 25: WRITE-to-WRITE .......................................................................................................................... 53
Figure 26: Random WRITE Cycles .................................................................................................................. 54
Figure 27: WRITE-to-READ ............................................................................................................................ 54
Figure 28: WRITE-to-PRECHARGE ................................................................................................................. 55
Figure 29: Terminating a WRITE Burst ............................................................................................................ 56
Figure 30: Alternating Bank Write Accesses ..................................................................................................... 57
Figure 31: WRITE – Continuous Page Burst ..................................................................................................... 58
Figure 32: WRITE – DQM Operation ............................................................................................................... 59
Figure 33: READ With Auto Precharge Interrupted by a READ ......................................................................... 61
Figure 34: READ With Auto Precharge Interrupted by a WRITE ........................................................................ 62
Figure 35: READ With Auto Precharge ............................................................................................................ 63
Figure 36: READ Without Auto Precharge ....................................................................................................... 64
Figure 37: Single READ With Auto Precharge .................................................................................................. 65
Figure 38: Single READ Without Auto Precharge ............................................................................................. 66
Figure 39: WRITE With Auto Precharge Interrupted by a READ ........................................................................ 67
Figure 40: WRITE With Auto Precharge Interrupted by a WRITE ...................................................................... 67
Figure 41: WRITE With Auto Precharge ........................................................................................................... 68
Figure 42: WRITE Without Auto Precharge ..................................................................................................... 69
Figure 43: Single WRITE With Auto Precharge ................................................................................................. 70
Figure 44: Single WRITE Without Auto Precharge ............................................................................................ 71
Figure 45: Auto Refresh Mode ........................................................................................................................ 73
Figure 46: Self Refresh Mode .......................................................................................................................... 75
Figure 47: Power-Down Mode ........................................................................................................................ 76
Figure 48: Clock Suspend During WRITE Burst ............................................................................................... 78
Figure 49: Clock Suspend During READ Burst ................................................................................................. 79
Figure 50: Clock Suspend Mode ..................................................................................................................... 80
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y68m_mobile_lpsdr.pdf – Rev. D 1/11 EN
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