MT48H32M32LFB5-6 IT:B Micron, MT48H32M32LFB5-6 IT:B Datasheet - Page 54
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MT48H32M32LFB5-6 IT:B
Manufacturer Part Number
MT48H32M32LFB5-6 IT:B
Description
Manufacturer
Micron
Datasheet
1.MT48H32M32LFB5-6_ITB.pdf
(81 pages)
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Figure 26: Random WRITE Cycles
Figure 27: WRITE-to-READ
PDF: 09005aef8404b23d
y68m_mobile_lpsdr.pdf – Rev. D 1/11 EN
Note:
Note:
Command
Command
Address
Address
1. Each WRITE command can be issued to any bank. DQM is LOW.
1. The WRITE command can be issued to any bank, and the READ command can be to any
bank. DQM is LOW. CL = 2 for illustration.
CLK
CLK
DQ
DQ
WRITE
WRITE
Bank,
Bank,
Col n
Col n
D
D
T0
T0
n
n
IN
IN
WRITE
n + 1
Bank,
Col a
NOP
D
T1
T1
D
IN
a
IN
54
WRITE
Bank,
Col x
READ
Bank,
Col b
D
T2
T2
x
IN
Don’t Care
WRITE
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Bank,
Col m
T3
T3
NOP
D
m
IN
1Gb: x32 Mobile LPSDR SDRAM
D
NOP
T4
OUT
b
Don’t Care
NOP
D
b + 1
T5
OUT
© 2010 Micron Technology, Inc. All rights reserved.
WRITE Operation
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