MT48H32M32LFB5-6 IT:B Micron, MT48H32M32LFB5-6 IT:B Datasheet - Page 47

• Manufacturer Part Number: MT48H32M32LFB5-6 IT:B
• Manufacturer: Micron

Figure 18: READ-to-WRITE With Extra Clock Cycle
Figure 19: READ-to-PRECHARGE
PDF: 09005aef8404b23d
y68m_mobile_lpsdr.pdf – Rev. D 1/11 EN
Note:
Note:
Command
Command
Command
Address
Address
Address
1. CL = 3. The READ command can be issued to any bank, and the WRITE command can be
1. DQM is LOW.
DQM
CLK
to any bank.
CLK
CLK
DQ
DQ
DQ
Bank a,
Bank a,
Bank,
T0
T0
Col n
T0
READ
Col n
READ
READ
Col
CL = 2
CL = 3
T1
T1
T1
NOP
NOP
NOP
47
T2
T2
T2
NOP
NOP
NOP
D
OUT
n
Transitioning data
T3
T3
T3
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NOP
NOP
NOP
D
D
D
n + 1
t HZ
OUT
OUT
OUT
n
n
1Gb: x32 Mobile LPSDR SDRAM
PRECHARGE
PRECHARGE
(a or all)
(a or all)
T4
T4
T4
Bank
Bank
NOP
X = 1 cycle
D
n + 2
D
n + 1
Transitioning data
OUT
OUT
X = 2 cycles
T5
T5
T5
Don’t Care
Bank,
WRITE
Col b
NOP
NOP
D
IN
D
D
n + 2
n + 3
OUT
OUT
t DS
b
t RP
t RP
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T6
T6
READ Operation
NOP
NOP
D
n + 3
OUT
Don’t Care
ACTIVE
Bank a,
ACTIVE
Bank a,
T7
T7
Row
Row