C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 218

• Manufacturer Part Number: C8051F966-A-GQ
• Description: 8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
• Manufacturer: Silicon Labs

Specifications of C8051F966-A-GQ

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 24.5 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.8 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: QFP-80
• Mounting Style: SMD/SMT

C8051F96x
SFR Definition 16.1. SFRPGCN: SFR Page Control
;SFR Page = 0xF; SFR Address = 0x8E
218
7:1
Bit
Name
Reset
0
Type
Bit
SFRPGEN SFR Automatic Page Control Enable.
Unused
Name
R
7
0
Read = 0000000b; Write = Don’t Care
Upon interrupt, the C8051 Core will vector to the specified interrupt service routine.
This bit controls the automatic preservation and restoration of the SRFPAGE by hard-
ware.
0: SFR Automatic Paging disabled. The C8051 core will neither preserve the SRF-
PAGE upon entering an interrupt service routine, nor restore the SFRPAGE upon
exiting the interrupt service routine. The interrupt service routine should preserve and
restore the active SFRPAGE in firmware.
1: SFR Automatic Paging enabled. The C8051 core will preserve the SRFPAGE upon
entering an interrupt service routine and restore the SFRPAGE upon exiting the Inter-
rupt service routine. The firmware does not need to preserve and restore the SFRP-
AGE in the interrupt service routing. However, firmware must set the SFRPAGE
within the interrupt service routine before accessing SFRs.
R
6
0
R
5
0
Rev. 0.5
R
4
0
Function
R
3
0
R
2
0
R
1
0
SFRPGEN
R/W
0
1