C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 332

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C8051F966-A-GQ

Manufacturer Part Number
C8051F966-A-GQ
Description
8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F966-A-GQ

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F966-A-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F966-A-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F96x
SFR Definition 25.20. PC0INT0: PC0 Interrupt 0
SFR Address = 0xFB; SFR Page = 0x2
332
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
CMP1F
DIRCHGEN
R/W
DIRCHGF
CMP1EN
CMP0EN
7
0
OVREN
CMP1F
CMP0F
OVRF
Name
CMP1EN
R/W
6
0
Comparator 1 Flag
0: Counter 1 did not match comparator 1 value.
1: Counter 1 matched comparator 1 value.
Comparator 1 Interrupt/Wake-up Source Enable
0:CMP1F not enabled as interrupt or wake-up source.
1:CMP1F enabled as interrupt or wake-up source.
Comparator 0 Flag
0: Counter 0 did not match comparator 0 value.
1: Counter 0 matched comparator 0 value.
Comparator 0 Interrupt/Wake-up Source Enable
0:CMP0F not enabled as interrupt or wake-up source.
1:CMP0F enabled as interrupt or wake-up source.
Counter Overflow Flag
1:Neither of the counters has overflowed.
1:One of the counters has overflowed.
Counter Overflow Interrupt/Wake-up Source Enable
0:OVRF not enabled as interrupt or wake-up source.
1:OVRF enabled as interrupt or wake-up source.
Direction Change Flag
Direction changed for quadrature mode only.
0:No change in direction detected.
1:Direction Change detected.
Direction Change Interrupt/Wake-up Source Enable
0:DIRCHGF not enabled as interrupt or wake-up source.
1:DIRCHGF enabled as interrupt or wake-up source.
CMP0F
R/W
5
0
CMP0EN
R/W
4
0
Rev. 0.5
OVRF
R/W
3
0
Function
OVREN
R/W
2
0
DIRCHGF DIRCHGEN
R/W
1
0
R/W
0
0

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