C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 277

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C8051F966-A-GQ

Manufacturer Part Number
C8051F966-A-GQ
Description
8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F966-A-GQ

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT

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21. Voltage Regulator (VREG0)
C8051F96x devices include an internal voltage regulator (VREG0) to regulate the internal core supply to
1.8 V from a VDD/DC+ supply of 1.8 to 3.6 V. Electrical characteristics for the on-chip regulator are speci-
fied in the Electrical Specifications chapter.
The REG0CN register allows the Precision Oscillator Bias to be disabled, reducing supply current in all
non-sleep power modes. This bias should only be disabled when the precision oscillator is not being used.
The internal regulator (VREG0) is disabled when the device enters sleep mode and remains enabled when
the device enters suspend mode. See Section “19. Power Management” on page 257 for complete details
about low power modes.
SFR Definition 21.1. REG0CN: Voltage Regulator Control
SFR Page = 0x0; SFR Address = 0xC9
21.1. Voltage Regulator Electrical Specifications
See Table 4.17 on page 75 for detailed Voltage Regulator Electrical Specifications.
Name
Reset
Type
Bit
7:5
3:0
Bit
4
OSCBIAS Precision Oscillator Bias.
Reserved Read = 000b. Must Write 000b.
Reserved Read = 0000b. Must Write 0000b.
Name
R/W
7
0
When set to 1, the bias used by the precision oscillator is forced on. If the precision
oscillator is not being used, this bit may be cleared to 0 to to save supply current in
all non-Sleep power modes.
R/W
6
0
R/W
5
0
OSCBIAS
R/W
Rev. 0.5
4
1
Function
R/W
3
0
R/W
2
0
C8051F96x
R/W
1
0
R/W
0
0
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