C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 322

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C8051F966-A-GQ

Manufacturer Part Number
C8051F966-A-GQ
Description
8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F966-A-GQ

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F966-A-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F966-A-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F96x
SFR Definition 25.2. PC0PCF: PC0 Mode Pull-Up Configuration
SFR Address = 0xD7; SFR Page = 0x2
322
Name
Reset
4:2
1:0
Bit
Type
7
6
5
Bit
PUCAL
R/W
CALPORT
DUTY[1:0]
CALRES
RES[2:0]
7
0
PUCAL
Name
CALRES
R
6
1
Pull-Up Driver Calibration
0: Calibration complete or not running.
1: Start calibration of pull up (Self clearing). 
Calibration determines the lowest usable pull-up strength.
Calibration Result
0: Fail (switch may be closed preventing detection of pull ups). 
Writes value of 0x11111 to PC0PCF[4:0]
1: Pass (writes calibrated value into PC0PCF[4:0]).
Calibration Port
0: Calibration on PC0 only.
1: Calibration on PC1 only.
Pull-Up Resistor Select
Current with force pull-up on bit set (PC0TH.2=1) and VBAT=3.6V.
000: Pull-up disabled.
001: 1 A.*
010: 4 A.*
011: 16 A.*
100: 64 A.*
101: 256 A.*
110: 1 mA.*
111: 4 mA.*
*The effective average pull-up current depends on selected resistor, pull-up
resistor duty-cycle multiplier, and sample rate duty-cycle multiplier.
Pull-Up Resistor Duty Cycle Multiplier
000: 1/4 (25%)*
001: 3/8 (37.5%)*
010: 1/2 (50%)*
011: 3/4 (75%)*
*The final pull-up resistor duty cycle is the sample rate duty-cycle multiplier
times the pull-up duty-cycle multiplier.
CALPORT
R/W
5
0
R/W
Rev. 0.5
4
0
RES[2:0]
R/W
3
0
Function
R/W
2
1
R/W
1
0
DUTY[1:0]
R/W
0
0

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