LPC1114FHN33/302 NXP Semiconductors, LPC1114FHN33/302 Datasheet - Page 16

• Manufacturer Part Number: LPC1114FHN33/302
• Description: ARM Microcontrollers - MCU 32b 32K Flash 42I/O
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/302

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Interface Type: I2C, SPI, SSP, UART
• Maximum Operating Temperature: + 85 C
• Number Of Programmable I/os: 42
• Number Of Timers: 4
• Program Memory Type: Flash
• Factory Pack Quantity: 260
• Tradename: LPC1100L

NXP Semiconductors
Table 4.
LPC111X
Product data sheet
Symbol
PIO0_0 to PIO0_11
RESET/PIO0_0
PIO0_1/CLKOUT/
CT32B0_MAT2
PIO0_2/SSEL0/
CT16B0_CAP0
PIO0_4/SCL
PIO0_5/SDA
PIO0_6/SCK0
PIO0_8/MISO0/
CT16B0_MAT0
PIO0_9/MOSI0/
CT16B0_MAT1
SWCLK/PIO0_10/
SCK0/
CT16B0_MAT2
LPC1100L series: LPC1110/11/12 pin description table (SO20 and TSSOP20 package with
I
2
C-bus pins)
6.2 Pin description
17
18
19
20
5
6
1
2
3
[2]
[3]
[3]
[4]
[4]
[3]
[3]
[3]
[3]
Start
logic
input
yes
yes
yes
yes
yes
yes
yes
yes
yes
Type Reset
I/O
I
I/O
I/O
O
O
I/O
I/O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I/O
I/O
O
I
I/O
I/O
O
All information provided in this document is subject to legal disclaimers.
-
state
[1]
I; PU
-
I; PU
-
-
I; PU
-
-
I; IA
-
I; IA
-
I; PU
-
I; PU
-
-
I; PU
-
-
I; PU
-
-
Rev. 8 — 20 February 2013
Description
Port 0 — Port 0 is a 12-bit I/O port with individual direction and
function controls for each bit. The operation of port 0 pins depends
on the function selected through the IOCONFIG register block.
RESET — External reset input with 20 ns glitch filter. A LOW-going
pulse as short as 50 ns on this pin resets the device, causing I/O
ports and peripherals to take on their default states, and processor
execution to begin at address 0.
PIO0_0 — General purpose digital input/output pin with 10 ns glitch
filter.
PIO0_1 — General purpose digital input/output pin. A LOW level on
this pin during reset starts the ISP command handler.
CLKOUT — Clockout pin.
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
PIO0_2 — General purpose digital input/output pin.
SSEL0 — Slave Select for SPI0.
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_4 — General purpose digital input/output pin (open-drain).
SCL — I
only if I
register.
PIO0_5 — General purpose digital input/output pin (open-drain).
SDA — I
only if I
register.
PIO0_6 — General purpose digital input/output pin.
SCK0 — Serial clock for SPI0.
PIO0_8 — General purpose digital input/output pin.
MISO0 — Master In Slave Out for SPI0.
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
PIO0_9 — General purpose digital input/output pin.
MOSI0 — Master Out Slave In for SPI0.
CT16B0_MAT1 — Match output 1 for 16-bit timer 0.
SWCLK — Serial wire clock.
PIO0_10 — General purpose digital input/output pin.
SCK0 — Serial clock for SPI0.
CT16B0_MAT2 — Match output 2 for 16-bit timer 0.
2
2
C Fast-mode Plus is selected in the I/O configuration
C Fast-mode Plus is selected in the I/O configuration
2
2
C-bus, open-drain clock input/output. High-current sink
C-bus, open-drain data input/output. High-current sink
LPC1110/11/12/13/14/15
32-bit ARM Cortex-M0 microcontroller
© NXP B.V. 2013. All rights reserved.
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