LPC1111FHN33/102'5 NXP Semiconductors, LPC1111FHN33/102'5 Datasheet - Page 298
LPC1111FHN33/102'5
Manufacturer Part Number
LPC1111FHN33/102'5
Description
ARM Microcontrollers - MCU CORTEX-M0 8 KB FL 4 KB SRAM
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1113FHN333035.pdf
(538 pages)
Specifications of LPC1111FHN33/102'5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1111
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Mounting Style
SMD/SMT
Interface Type
I2C, SPI, UART
Number Of Programmable I/os
42
Number Of Timers
4
Program Memory Type
Flash
Factory Pack Quantity
4000
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UM10398
User manual
16.7.2.2 CAN message transfer
16.7.2.3 Disabled Automatic Retransmission (DAR)
Resetting the INIT bit finishes the software initialization. Afterwards the Bit Stream
Processor BSP synchronizes itself to the data transfer on the CAN bus by waiting for the
occurrence of a sequence of 11 consecutive recessive bits (Bus Idle) before it can take
part in bus activities and starts the message transfer.
Remark: The initialization of the Message Objects is independent of INIT and also can be
done on the fly, but the Message Objects should all be configured to particular identifiers
or set to not valid during software initialization before the BSP starts the message transfer.
To change the configuration of a Message Object during normal operation, the CPU has to
start by setting the MSGVAL bit to not valid. When the configuration is completed,
MSAGVALis set to valid again.
Once the CAN controller is initialized and INIT is reset to zero, the CAN core synchronizes
itself to the CAN bus and starts the message transfer.
Received messages are stored into their appropriate Message Objects if they pass the
Message Handler’s acceptance filtering. The whole message including all arbitration bits,
DLC and eight data bytes is stored into the Message Object. If the Identifier Mask is used,
the arbitration bits which are masked to “don’t care” may be overwritten in the Message
Object.
The CPU may read or write each message any time via the Interface Registers. The
Message Handler guarantees data consistency in case of concurrent accesses.
Messages to be transmitted are updated by the CPU. If a permanent Message Object
(arbitration and control bits set up during configuration) exists for the message, only the
data bytes are updated and then TXRQUT bit with NEWDAT bit are set to start the
transmission. If several transmit messages are assigned to the same Message Object
(when the number of Message Objects is not sufficient), the whole Message Object has to
be configured before the transmission of this message is requested.
The transmission of any number of Message Objects may be requested at the same time,
and they are transmitted subsequently according to their internal priority. Messages may
be updated or set to not valid any time, even when their requested transmission is still
pending. The old data will be discarded when a message is updated before its pending
transmission has started.
Depending on the configuration of the Message Object, the transmission of a message
may be requested autonomously by the reception of a remote frame with a matching
identifier.
According to the CAN Specification (ISO11898, 6.3.3 Recovery Management), the CAN
controller provides means for automatic retransmission of frames that have lost arbitration
or that have been disturbed by errors during transmission. The frame transmission service
will not be confirmed to the user before the transmission is successfully completed. By
default, the automatic retransmission on lost arbitration or error is enabled. It can be
disabled to enable the CAN controller to work within a Time Triggered CAN (TTCAN, see
ISO11898-1) environment.
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Chapter 16: LPC111x/LPC11Cxx C_CAN controller
UM10398
© NXP B.V. 2012. All rights reserved.
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