LPC1111FHN33/102'5 NXP Semiconductors, LPC1111FHN33/102'5 Datasheet - Page 486

• Manufacturer Part Number: LPC1111FHN33/102'5
• Description: ARM Microcontrollers - MCU CORTEX-M0 8 KB FL 4 KB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1111FHN33/102'5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1111
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Mounting Style: SMD/SMT
• Interface Type: I2C, SPI, UART
• Number Of Programmable I/os: 42
• Number Of Timers: 4
• Program Memory Type: Flash
• Factory Pack Quantity: 4000

NXP Semiconductors
UM10398
User manual
28.5.5.7.3 Restrictions
28.5.5.7.4 Condition flags
28.5.5.7.5 Examples
28.5.5.8.1 Syntax
28.5.5.8.2 Operation
28.5.5.8.3 Restrictions
28.5.5.8.4 Condition flags
28.5.5.8 SXT and UXT
REVSH — converts 16-bit signed big-endian data into 32-bit signed little-endian data or
16-bit signed little-endian data into 32-bit signed big-endian data.
In these instructions, Rd, and Rn must only specify R0-R7.
These instructions do not change the flags.
Sign extend and Zero extend.
SXTB Rd, Rm
SXTH Rd, Rm
UXTB Rd, Rm
UXTH Rd, Rm
where:
These instructions extract bits from the resulting value:
In these instructions, Rd and Rm must only specify R0-R7.
These instructions do not affect the flags.
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REV R3, R7 ; Reverse byte order of value in R7 and write it to R3
Rd is the destination register.
Rm is the register holding the value to be extended.
SXTB extracts bits[7:0] and sign extends to 32 bits
UXTB extracts bits[7:0] and zero extends to 32 bits
SXTH extracts bits[15:0] and sign extends to 32 bits
UXTH extracts bits[15:0] and zero extends to 32 bits.
REV16 R0, R0 ; Reverse byte order of each 16-bit halfword in R0
REVSH R0, R5 ; Reverse signed halfword
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
UM10398
© NXP B.V. 2012. All rights reserved.
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