1893CKLFT IDT, 1893CKLFT Datasheet - Page 105

• Manufacturer Part Number: 1893CKLFT
• Description: Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
• Manufacturer: IDT

Specifications of 1893CKLFT

• Rohs: yes
• Part # Aliases: ICS1893CKLFT

9.5.7 MII Management Interface Timing
ICS1893CK-40, Rev. C, 06/02/09
Table 9-14
timings of signals on the MDC and MDIO pins).
Table 9-14. MII Management Interface Timing
† The ICS1893CK-40 is tested at 25 MHz (a 40-ns period) with a 50-pF load. Designs must account for all board
Figure 9-8. MII Management Interface Timing Diagram
MDC
MDIO
(Output)
MDC
MDIO
(Input)
Period
loading of MDC.
Time
t1
t2
t3
t4
t5
t6
ICS1893CK-40 Data Sheet Rev. C - Release
MDC Minimum High Time
MDC Minimum Low Time
MDC Period
MDC Rise Time to MDIO Valid
MDIO Setup Time to MDC
MDIO Hold Time after MDC
lists the significant time periods for the MII Management Interface timing (which consists of
t1
Parameter
Copyright © 2009, Integrated Device Technology, Inc.
t3
t2
t5
t4
t6
All rights reserved.
105
Figure 9-8
shows the timing diagram for the time periods.
Conditions
Chapter 9 DC and AC Operating Conditions
–
–
–
–
–
–
400†
Min.
160
160
10
10
0
Typ.
–
–
†
–
–
–
Max.
300
–
–
–
–
–
June 2009
Units
ns
ns
ns
ns
ns
ns