1893CKLFT IDT, 1893CKLFT Datasheet - Page 111

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1893CKLFT

Manufacturer Part Number
1893CKLFT
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet

Specifications of 1893CKLFT

Rohs
yes
Part # Aliases
ICS1893CKLFT
9.5.13 100M MII Media Independent Interface: Receive Latency
ICS1893CK-40, Rev. C, 06/02/09
TP_RX
RXCLK
RXD
Table 9-20
time periods consist of timings of signals on the following pins:
Figure 9-14
Table 9-20. 100M MII / 100M Stream Interface Receive Latency Timing
Figure 9-14. 100M MII / 100M Stream Interface: Receive Latency Timing Diagram
Period
unscrambled.
Time
TP_RX (that is, TP_RXP and TP_RXN)
RXCLK
RXD (that is, RXD[3:0])
Shown
t1
ICS1893CK-40 Data Sheet Rev. C - Release
First Bit of /J/ into TP_RX to /J/ on RXD 100M MII
lists the significant time periods for the 100M MII / 100M Stream Interface receive latency. The
shows the timing diagram for the time periods.
Parameter
Copyright © 2009, Integrated Device Technology, Inc.
All rights reserved.
111
t1
Conditions
Chapter 9 DC and AC Operating Conditions
Min. Typ. Max.
16
17
Bit times
June 2009
Units

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