C8051F707-GMR Silicon Labs, C8051F707-GMR Datasheet - Page 186
C8051F707-GMR
Manufacturer Part Number
C8051F707-GMR
Description
8-bit Microcontrollers - MCU 16kB Cap Sense
Manufacturer
Silicon Labs
Datasheet
1.C8051F709-GQR.pdf
(306 pages)
Specifications of C8051F707-GMR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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The crossbar peripherals are assigned in priority order from top to bottom, according to this
diagram.
enabled, the Crossbar should be manually configured to skip the corresponding port pins.
* NSS is only pinned out when the SPI is in 4-wire mode.
Pin Number
SYSCLK
Function
Pin Skip
These boxes represent Port pins which can potentially be assigned to a peripheral.
Special Function Signals are not assigned by the crossbar. When these signals are
Pins can be “skipped” by setting the corresponding bit in PnSKIP to 1.
Settings
Special
Signals
CP0A
CEX0
CEX1
CEX2
MISO
MOSI
NSS*
SCK
SDA
RX0
SCL
CP0
Port
TX0
ECI
T0
T1
Figure 28.4. Crossbar Priority Decoder—Possible Pin Assignments
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0
P0SKIP
P0
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0
Rev. 1.0
P1SKIP
P1
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0
P2SKIP
P2
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