C8051F707-GMR Silicon Labs, C8051F707-GMR Datasheet - Page 187
C8051F707-GMR
Manufacturer Part Number
C8051F707-GMR
Description
8-bit Microcontrollers - MCU 16kB Cap Sense
Manufacturer
Silicon Labs
Datasheet
1.C8051F709-GQR.pdf
(306 pages)
Specifications of C8051F707-GMR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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- Download datasheet (2Mb)
This example shows a crossbar configuration with XBR0 = 0x07 and XBR1 = 0x43.
Pin Number
Figure 28.5. Crossbar Priority Decoder in Example Configuration—No Pins Skipped
SYSCLK
Function
Pin Skip
These boxes represent Port pins which are assigned to a peripheral.
Settings
Special
Signals
CP0A
CEX0
CEX1
CEX2
MISO
MOSI
NSS*
SCK
SDA
RX0
SCL
CP0
Port
TX0
ECI
T0
T1
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0
P0SKIP
P0
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0
Rev. 1.0
TX0 and RX0 are fixed at these locations
The other peripherals are assigned based on
pin availability, in priority order.
P1SKIP
P1
C8051F70x/71x
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0
P2SKIP
P2
187
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