C8051F707-GMR Silicon Labs, C8051F707-GMR Datasheet - Page 65
C8051F707-GMR
Manufacturer Part Number
C8051F707-GMR
Description
8-bit Microcontrollers - MCU 16kB Cap Sense
Manufacturer
Silicon Labs
Datasheet
1.C8051F709-GQR.pdf
(306 pages)
Specifications of C8051F707-GMR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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10.5. ADC0 Analog Multiplexer
ADC0 on the C8051F700/2/4/6/8 and C8051F710/2/4/6 uses an analog input multiplexer to select the pos-
itive input to the ADC. Any of the following may be selected as the positive input: Port 0 or Port 1 I/O pins,
the on-chip temperature sensor, or the positive power supply (V
the ADC0MX register described in SFR Definition 10.9.
Important Note About ADC0 Input Configuration: Port pins selected as ADC0 inputs should be config-
ured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for analog
input, set the corresponding bit in register PnMDIN to 0. To force the Crossbar to skip a Port pin, set the
corresponding bit in register PnSKIP to 1. See Section “28. Port Input/Output” on page 180 for more Port
I/O configuration details.
Sensor
Temp
VREG Output
Figure 10.6. ADC0 Multiplexer Block Diagram
P0.0
P1.7
GND
VDD
ADC0MX
Rev. 1.0
AMUX
DD
). The ADC0 input channel is selected in
C8051F70x/71x
ADC0
65
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