DS2155LC1 Maxim Integrated, DS2155LC1 Datasheet - Page 106
![no-image](/images/no-image-200.jpg)
DS2155LC1
Manufacturer Part Number
DS2155LC1
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS2155GNB.pdf
(238 pages)
- Current page: 106 of 238
- Download datasheet (2Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive Elastic Store Slip-Occurrence Event (RSLIP). Set when the receive elastic store has either
repeated or deleted a frame.
Bit 1/Receive Elastic Store Empty Event (RESEM). Set when the receive elastic store buffer empties and a
frame is repeated.
Bit 2/Receive Elastic Store Full Event (RESF). Set when the receive elastic store buffer fills and a frame is
deleted.
Bit 3/Transmit Elastic Store Slip-Occurrence Event (TSLIP). Set when the transmit elastic store has either
repeated or deleted a frame.
Bit 4/Transmit Elastic Store Empty Event (TESEM). Set when the transmit elastic store buffer empties and a
frame is repeated.
Bit 5/Transmit Elastic Store Full Event (TESF). Set when the transmit elastic store buffer fills and a frame is
deleted.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive Elastic Store Slip-Occurrence Event (RSLIP)
Bit 1/Receive Elastic Store Empty Event (RESEM)
Bit 2/Receive Elastic Store Full Event (RESF)
Bit 3/Transmit Elastic Store Slip-Occurrence Event (TSLIP)
Bit 4/Transmit Elastic Store Empty Event (TESEM)
Bit 5/Transmit Elastic Store Full Event (TESF)
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
—
—
7
7
0
0
—
—
SR5
Status Register 5
1Eh
IMR5
Interrupt Mask Register 5
1Fh
6
0
6
0
TESF
TESF
5
0
5
0
TESEM
TESEM
4
0
4
0
106 of 238
TSLIP
TSLIP
3
0
3
0
RESF
RESF
2
0
2
0
RESEM
RESEM
1
0
1
0
RSLIP
RSLIP
0
0
0
0
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