DS2155LC1 Maxim Integrated, DS2155LC1 Datasheet - Page 31
![no-image](/images/no-image-200.jpg)
DS2155LC1
Manufacturer Part Number
DS2155LC1
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS2155GNB.pdf
(238 pages)
- Current page: 31 of 238
- Download datasheet (2Mb)
LQFP
100
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PIN
CSBGA
K10
H10
D10
A10
E10
C10
B10
F10
J10
H8
G7
H9
G8
G9
D9
D8
A9
A8
A7
A6
D6
A5
A4
D5
A3
A2
E9
E8
E7
C9
B9
C8
C6
B6
E6
B5
C5
B4
C4
B3
F9
F7
F6
J9
ALE (AS)/A7
RLOS/LOTC
SYMBOL
TSYSCLK
RSYSCLK
WR (R/W)
RMSYNC
TCHCLK
RCHCLK
RFSYNC
TSSYNC
RD (DS)
ESIBRD
D0/AD0
D1/AD1
D2/AD2
D3/AD3
D4/AD4
D5/AD5
D6/AD6
D7/AD7
RDATA
RCLKO
RNEGO
RLCLK
RSYNC
ESIBS1
RPOSO
RLINK
RNEGI
RCLKI
RPOSI
RSIGF
RCLK
RSER
MUX
RSIG
A0
A1
A2
A3
A4
A5
A6
CS
31 of 238
TYPE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Data Bus Bit0/Address/Data Bus Bit 0
Data Bus Bit1/Address/Data Bus Bit 1
Data Bus Bit 2/Address/Data Bus 2
Data Bus Bit 3/Address/Data Bus Bit 3
Data Bus Bit 5/Address/Data Bus Bit 5
Data Bus Bit 6/Address/Data Bus Bit 6
Data Bus Bit 7/Address/Data Bus Bit 7
Address Latch Enable/Address Bus Bit 7
Receive Data
Receive Positive-Data Output
Receive Signaling Output
Transmit System Clock
Transmit System Sync
Transmit Channel Clock
Extended System Information Bus 1
Bus Operation
Data Bus Bit4/Address/Data Bus Bit 4
Address Bus Bit 0
Address Bus Bit 1
Address Bus Bit 2
Address Bus Bit 3
Address Bus Bit 4
Address Bus Bit 5
Address Bus Bit 6
Read Input (Data Strobe)
Chip Select
Extended System Information Bus Read
Write Input (Read/Write)
Receive Link Data
Receive Link Clock
Receive Clock
Receive Positive-Data Input
Receive Negative-Data Input
Receive Clock Input
Receive Clock Output
Receive Negative-Data Output
Receive Channel Clock
Receive Signaling-Freeze Output
Receive Serial Data
Receive Multiframe Sync
Receive Frame Sync
Receive Sync
Receive Loss-of-Sync/Loss-of-Transmit Clock
Receive System Clock
FUNCTION
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