DS2155LC1 Maxim Integrated, DS2155LC1 Datasheet - Page 139
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DS2155LC1
Manufacturer Part Number
DS2155LC1
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS2155GNB.pdf
(238 pages)
- Current page: 139 of 238
- Download datasheet (2Mb)
23.3.5 HDLC FIFOs
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Transmit HDLC Data Bit 0 (THD0). LSB of an HDLC packet data byte.
Bit 1/Transmit HDLC Data Bit 1 (THD1)
Bit 2/Transmit HDLC Data Bit 2 (THD2)
Bit 3/Transmit HDLC Data Bit 3 (THD3)
Bit 4/Transmit HDLC Data Bit 4 (THD4)
Bit 5/Transmit HDLC Data Bit 5 (THD5)
Bit 6/Transmit HDLC Data Bit 6 (THD6)
Bit 7/Transmit HDLC Data Bit 7 (THD7). MSB of an HDLC packet data byte.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive HDLC Data Bit 0 (RHD0). LSB of an HDLC packet data byte.
Bit 1/Receive HDLC Data Bit 1 (RHD1)
Bit 2/Receive HDLC Data Bit 2 (RHD2)
Bit 3/Receive HDLC Data Bit 3 (RHD3)
Bit 4/Receive HDLC Data Bit 4 (RHD4)
Bit 5/Receive HDLC Data Bit 5 (RHD5)
Bit 6/Receive HDLC Data Bit 6 (RHD6)
Bit 7/Receive HDLC Data Bit 7 (RHD7). MSB of an HDLC packet data byte.
RHD7
THD7
7
7
0
0
THD6
RHD6
H1TF, H2TF
HDLC # 1 Transmit FIFO
HDLC # 2 Transmit FIFO
9Dh, ADh
H1RF, H2RF
HDLC # 1 Receive FIFO
HDLC # 2 Receive FIFO
9Eh, AEh
6
0
6
0
RHD5
THD5
5
0
5
0
RHD4
THD4
4
0
4
0
139 of 238
RHD3
THD3
3
0
3
0
THD2
RHD2
2
0
2
0
RHD1
THD1
1
0
1
0
THD0
RHD0
0
0
0
0
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