DS2155LC1 Maxim Integrated, DS2155LC1 Datasheet - Page 145
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DS2155LC1
Manufacturer Part Number
DS2155LC1
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS2155GNB.pdf
(238 pages)
- Current page: 145 of 238
- Download datasheet (2Mb)
DS2155
24.3 Transmitter
The DS2155 uses a phase-lock loop along with a precision digital-to-analog converter (DAC) to create
the waveforms that are transmitted onto the E1 or T1 line. The waveforms created by the DS2155 meet
the latest ETSI, ITU, ANSI, and AT&T specifications. The user selects which waveform is generated by
setting the ETS bit (LIC2.7) for E1 or T1 operation, then programming the L2/L1/L0 bits in register LIC1
for the appropriate application.
A 2.048MHz or 1.544MHz clock is required at TCLKI for transmitting data presented at TPOSI and
TNEGI. Normally these pins are connected to TCLKO, TPOSO, and TNEGO. However, the LIU can
operate in an independent fashion. ITU specification G.703 requires an accuracy of ±50ppm for both T1
and E1. TR62411 and ANSI specifications require an accuracy of ±32ppm for T1 interfaces. The clock
can be sourced internally from RCLK or JACLK. See LIC2.3, LIC4.4, and LIC4.5 for details. Because of
the nature of the transmitter’s design, very little jitter (less than 0.005UI
broadband from 10Hz to
P-P
100kHz) is added to the jitter present on TCLK. Also, the waveforms created are independent of the duty
cycle of TCLK. The transmitter in the DS2155 couples to the E1 or T1 transmit twisted pair (or coaxial
cable in some E1 applications) through a 1:2 step-up transformer. For the device to create the proper
waveforms, the transformer used must meet the specifications listed in
Table
24-C. The DS2155 has the
option of using software-selectable transmit termination.
The transmit line drive has two modes of operation: fixed gain or automatic gain. In the fixed gain mode,
the transmitter outputs a fixed current into the network load to achieve a nominal pulse amplitude. In the
automatic gain mode, the transmitter adjusts its output level to compensate for slight variances in the
network load. See the Transmit Line Build-Out Control (TLBC) register for details.
24.3.1 Transmit Short-Circuit Detector/Limiter
The DS2155 has an automatic short-circuit limiter that limits the source current to 50mA (RMS) into a
1Ω load. This feature can be disabled by setting the SCLD bit (LIC2.1) = 1. TCLE (INFO2.5) provides a
real-time indication of when the current limiter is activated. If the current limiter is disabled, TCLE
indicates that a short-circuit condition exists. Status Register SR1.2 provides a latched version of the
information, which can be used to activate an interrupt when enabled by the IMR1 register. The TPD bit
(LIC1.0) powers down the transmit line driver and tri-states the TTIP and TRING pins.
24.3.2 Transmit Open-Circuit Detector
The DS2155 can also detect when the TTIP or TRING outputs are open circuited. TOCD (INFO2.4)
provides a real-time indication of when an open circuit is detected. SR1 provides a latched version of the
information (SR1.1), which can be used to activate an interrupt when enabled by the IMR1 register.
24.3.3 Transmit BPV Error Insertion
When IBPV (LIC2.5) is transitioned from a 0 to a 1, the device waits for the next occurrence of three
consecutive 1s to insert a BPV. IBPV must be cleared and set again for another BPV error insertion.
24.3.4 Transmit G.703 Synchronization Signal (E1 Mode)
The DS2155 can transmit the 2.048MHz square-wave synchronization clock as specified in Section 13 of
ITU G.703, October 1998. In order to transmit the 2.048MHz clock, when in E1 mode, set the transmit
synchronization clock enable (LIC3.1) = 1.
145 of 238
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