DS2155LC1 Maxim Integrated, DS2155LC1 Datasheet - Page 199
![no-image](/images/no-image-200.jpg)
DS2155LC1
Manufacturer Part Number
DS2155LC1
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS2155GNB.pdf
(238 pages)
- Current page: 199 of 238
- Download datasheet (2Mb)
34.
34.1 Description
The DS2155 IEEE 1149.1 design supports the standard instruction codes SAMPLE/PRELOAD,
BYPASS, and EXTEST. Optional public instructions included are HIGH-Z, CLAMP, and IDCODE
(Figure
access port (TAP) and boundary scan architecture.
The DS2155 is pin-compatible with the DS2152, DS21x52 (T1) and DS2154, DS21x54 (E1) SCT
families. The JTAG feature uses pins that had no function in the DS2152 and DS2154. Details about
boundary scan architecture and the TAP are in IEEE 1149.1-1990, IEEE 1149.1a-1993, and IEEE
1149.1b-1994. NOTE: JTAG functionality is production tested at 25C only.
The TAP contains the necessary interface pins JTRST, JTCLK, JTMS, JTDI, and JTDO. See the pin
descriptions in Section
Figure 34-1. JTAG Functional Block Diagram
Test Access Port
TAP Controller
Instruction Register
Bypass Register
Boundary Scan Register
Device Identification Register
JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT
34-1.). The DS2155 contains the following features as required by IEEE 1149.1 standard test
4
10kΩ
for details.
+V
JTDI
10kΩ
+V
JTMS
TEST ACCESS PORT
BOUNDARY SCAN
IDENTIFICATION
CONTROLLER
INSTRUCTION
REGISTER
REGISTER
REGISTER
REGISTER
BYPASS
JTCLK
199 of 238
10kΩ
+V
JTRST
SELECT
OUTPUT ENABLE
MUX
JTDO
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