DS2155LC1 Maxim Integrated, DS2155LC1 Datasheet - Page 153
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DS2155LC1
Manufacturer Part Number
DS2155LC1
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS2155GNB.pdf
(238 pages)
- Current page: 153 of 238
- Download datasheet (2Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 3/Receive Level Bits (RL0 to RL3). Real-time bits
NOTE: RL0 through RL3 only indicate the signal range as specified by the EGL bit in LIC1. Example; if
EGL = 1 and in T1 mode, RL0 through RL3 will only indicate a signal range of >-2.5dB to –15dB even if the
signal is < -15dB.
Bit 4/Transmit Open-Circuit Detect (TOCD). A real-time bit that is set when the device detects that the TTIP
and TRING outputs are open-circuited.
Bit 5/Transmit Current-Limit Exceeded (TCLE). A real-time bit that is set when the 50mA (RMS) current
limiter is activated, whether the current limiter is enabled or not.
Bit 6/BOC Detected (BD). A real-time bit that is set high when the BOC detector is presently seeing a valid
sequence and set low when no BOC is currently being detected.
Bit 7/BERT Real-Time Synchronization Status (BSYNC). Real-time status of the synchronizer (this bit is not
latched). This bit is set when the incoming pattern matches for 32 consecutive bit positions. It is cleared when six
or more bits out of 64 are received in error. Refer to BSYNC in the BERT status register, SR9, for an interrupt-
generating version of this signal.
RL3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
BSYNC
RL2
7
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
INFO2
Information Register 2
11h
BD
6
0
RL1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
TCLE
5
0
RL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TOCD
4
0
Receive Level (dB)
153 of 238
Greater than -2.5
Less than -37.5
-10.0 to -12.5
-12.5 to -15.0
-15.0 to -17.5
-17.5 to -20.0
-20.0 to -22.5
-22.5 to -25.0
-25.0 to -27.5
-27.5 to -30.0
-30.0 to -32.5
-32.5 to -35.0
-35.0 to -37.5
-7.5 to -10.0
-2.5 to -5.0
-5.0 to -7.5
RL3
3
0
RL2
2
0
RL1
1
0
RL0
0
0
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