XRT83SL28ES Exar, XRT83SL28ES Datasheet - Page 16

• Manufacturer Part Number: XRT83SL28ES
• Description: Peripheral Drivers & Components - PCIs 8 CH E1 LIU SH
• Manufacturer: Exar

Specifications of XRT83SL28ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83SL28
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
The receive path of the XRT83SL28 LIU consists of 8 independent E1 receivers. The following section
describes the complete receive path from RTIP/RRING inputs to RCLK/RPOS/RNEG outputs. A simplified
block diagram of the receive path is shown in Figure 4.
F
The input stage of the receive path accepts standard E1 coaxial cable or E1 twisted pair inputs through RTIP
and RRING. The physical interface is optimized by placing the terminating impedance inside the LIU. This
allows one bill of materials for all modes of operation reducing the number of external components necessary
in system design. The receive termination impedance is selected by programming TERSEL[1:0] to match the
line impedance. The XRT83SL28 has the ability to switch the internal termination to "High" impedance for
redundancy applications. See Redundancy in the Applications Section of this datasheet. Selecting the internal
impedance is shown in Table 1. A typical connection diagram is shown in Figure 5.
F
1.0 RECEIVE PATH LINE INTERFACE
1.1
IGURE
IGURE
RNEG
RPOS
RCLK
4. S
5. T
Internal Termination
YPICAL
IMPLIFIED
C
Decoder
ONNECTION
HDB3
B
LOCK
Internal Impedance
XRT83SL28 LIU
D
IAGRAM OF THE
T
TERSEL[1:0]
D
ABLE
IAGRAM
0h (00)
1h (01)
2h (10)
3h (11)
Receiver
1: S
Input
Attenuator
Rx Jitter
U
ELECTING THE
SING
R
R
RING
TIP
R
ECEIVE
I
NTERNAL
14
P
120Ω for Tx and "High-Z" for Rx
I
ATH
75Ω for Tx and "High-Z" for Rx
NTERNAL
Clock & Data
One Bill of Materials
Recovery
T
ERMINATION
R
L
120Ω for Tx and Rx
1:1
INE
ECEIVE
75Ω for Tx and Rx
T
I
MPEDANCE
ERMINATION
T
ERMINATION
Line Interface E1
Peak Detector
& Slicer
(RTIP/RRING)
xr
REV. 1.0.0
RTIP
RRING