XRT83SL28ES Exar, XRT83SL28ES Datasheet - Page 22

• Manufacturer Part Number: XRT83SL28ES
• Description: Peripheral Drivers & Components - PCIs 8 CH E1 LIU SH
• Manufacturer: Exar

Specifications of XRT83SL28ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83SL28
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
The transmit path of the XRT83SL28 LIU consists of 8 independent E1 transmitters. The following section
describes the complete transmit path from TCLK/TPOS/TNEG inputs to TTIP/TRING outputs. A simplified
block diagram of the transmit path is shown in Figure 12.
In dual rail mode, TPOS and TNEG are the digital inputs for the transmit path. In single rail mode, TNEG can
be tied to ground unless Hardware mode is selected (see the Hardware Pin Description). The XRT83SL28 can
be programmed to sample the inputs on either edge of TCLK. By default, data is sampled on the falling edge of
TCLK. To sample data on the rising edge of TCLK, set TCLKinv to "1" in the appropriate global register.
Figure 13 is a timing diagram of the transmit input data sampled on the falling edge of TCLK. Figure 14 is a
timing diagram of the transmit input data sampled on the rising edge of TCLK. The timing specifications are
shown in Table 3.
F
F
F
2.0 TRANSMIT PATH LINE INTERFACE
2.1
IGURE
IGURE
IGURE
TPOS
TNEG
TCLK
13. T
14. T
12. S
TCLK/TPOS/TNEG Digital Inputs
RANSMIT
RANSMIT
IMPLIFIED
Encoder
HDB3
TPOS
TNEG
TCLK
D
D
TPOS
TNEG
TCLK
or
B
or
ATA
ATA
LOCK
S
S
AMPLED ON
AMPLED ON
D
IAGRAM OF THE
Attenuator
Tx Jitter
F
R
ALLING
ISING
T
E
T
T
RANSMIT
SU
SU
E
DGE OF
Control
Timing
DGE OF
20
TCLK
P
T
T
TCLK
ATH
HO
HO
TCLK
TCLK
Tx Pulse Shaper
F
R
TCLK
TCLK
R
F
Line Driver
xr
TTIP
TRING
REV. 1.0.0