PCA9629PW,118 NXP Semiconductors, PCA9629PW,118 Datasheet - Page 50

• Manufacturer Part Number: PCA9629PW,118
• Description: Motor / Motion / Ignition Controllers & Drivers I2C-bus Stepper motor controller
• Manufacturer: NXP Semiconductors
• Type: Stepper Motor Controllerr

Specifications of PCA9629PW,118

• Rohs: yes
• Product: Stepper Motor Controllers / Drivers
• Operating Supply Voltage: 4.5 V to 5.5 V
• Supply Current: 6 mA
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-16
• Factory Pack Quantity: 2500

NXP Semiconductors
22. Contents
1
2
3
4
4.1
5
6
6.1
6.2
7
7.1
7.2
7.3
7.3.1
7.3.1.1
7.3.1.2
7.3.2
7.3.3
7.3.4
7.3.4.1
7.3.4.2
7.3.5
7.3.5.1
7.3.5.2
7.3.5.3
7.3.5.4
7.3.5.5
7.3.5.6
7.3.5.7
7.3.6
7.3.6.1
7.3.6.2
7.3.6.3
7.3.6.4
7.3.7
7.3.8
7.3.9
7.3.10
PCA9629
Product data sheet
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Device address . . . . . . . . . . . . . . . . . . . . . . . . . 5
Command register . . . . . . . . . . . . . . . . . . . . . . 6
Register definitions . . . . . . . . . . . . . . . . . . . . . . 6
MODE — Mode register . . . . . . . . . . . . . . . . . . 8
Disable interrupt output pin (bit 5) . . . . . . . . . . 8
Outputs change on STOP (bit 4) . . . . . . . . . . . 8
SUBADR1 to SUBADR3 — I
subaddress 1 to 3 . . . . . . . . . . . . . . . . . . . . . . . 9
ALLCALLADR — All Call I
WDTOI — WatchDog Time-Out Interval
register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
WDCNTL — WatchDog Control register . . . . 11
GPIOs and interrupts . . . . . . . . . . . . . . . . . . . 12
INTSTAT — Interrupt Status register . . . . . . . 12
IOC — I/O Configuration register . . . . . . . . . . 13
MSK — Mask interrupt register. . . . . . . . . . . . 13
CLRINT — Clear Interrupts register . . . . . . . . 14
INTMODE — Interrupt Mode register . . . . . . . 14
Interrupt based motor control . . . . . . . . . . . . . 15
INT_ACT_SETUP — Interrupt Action
Setup control register . . . . . . . . . . . . . . . . . . . 16
INT_MTR_SETUP — Interrupt Motor
Setup control register . . . . . . . . . . . . . . . . . . . 16
INT_ES_SETUP — Interrupt Extra Steps
Setup control register . . . . . . . . . . . . . . . . . . . 17
INT_AUTO_CLR — Interrupt Auto Clear
register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SETMODE — output state on STOP
control register . . . . . . . . . . . . . . . . . . . . . . . . 19
PHCNTL — Phase Control register . . . . . . . . 19
SROTNL, SROTNH — Steps per rotation
registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
CWPWL, CWPWH — Clockwise step
pulse width register. . . . . . . . . . . . . . . . . . . . . 20
Watchdog timer. . . . . . . . . . . . . . . . . . . . . . . . 10
IP — Input Port register . . . . . . . . . . . . . . . . . 12
OP — Output Port register . . . . . . . . . . . . . . . 12
2
C-bus address . . . . 9
2
C-bus
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 29 February 2012
7.3.11
7.3.12
7.3.13
7.3.14
7.3.15
7.3.16
7.3.17
7.3.18
7.3.19
7.3.19.1
7.3.19.2
7.3.19.3
7.3.19.4
7.3.19.5
7.4
7.5
7.6
7.7
7.8
7.9
7.9.1
7.9.2
7.9.3
8
8.1
8.1.1
8.2
8.3
9
10
10.1
10.2
10.3
11
12
13
14
Characteristics of the I
Bus transactions . . . . . . . . . . . . . . . . . . . . . . . 35
Application design-in information . . . . . . . . . 36
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 38
Static characteristics . . . . . . . . . . . . . . . . . . . 38
Dynamic characteristics. . . . . . . . . . . . . . . . . 40
Test information . . . . . . . . . . . . . . . . . . . . . . . 42
CCWPWL, CCWPWH — Counter-clockwise
step pulse width register . . . . . . . . . . . . . . . . 21
CWSCOUNTL, CWSCOUNTH — Number
of clockwise steps register . . . . . . . . . . . . . . . 22
CCWSCOUNTL, CCWSCOUNTH — Number
of counter-clockwise steps register . . . . . . . . 22
CWRCOUNTL, CWRCOUNTH — Number
of clockwise rotations register . . . . . . . . . . . . 22
CCWRCOUNTL, CCWRCOUNTH — Number
of counter-clockwise rotations register. . . . . . 22
EXTRASTEPS0, EXTRASTEPS1 — Extra
steps count for INTP0, INTP1 control register 23
RMPCNTL — Ramp control register . . . . . . . 23
LOOPDLY — Loop delay timer register . . . . . 26
MCNTL — Motor control register . . . . . . . . . . 27
MCNTL[7]: start/stop motor . . . . . . . . . . . . . . 27
MCNTL[5]: hard stop . . . . . . . . . . . . . . . . . . . 28
MCNTL[4]: continuous operation . . . . . . . . . . 28
MCNTL[3:2]: steps and/or rotations . . . . . . . . 28
MCNTL[1:0]: clockwise (CW) /
counter-clockwise (CCW) . . . . . . . . . . . . . . . 28
Motor coil excitation . . . . . . . . . . . . . . . . . . . . 29
Power-on reset. . . . . . . . . . . . . . . . . . . . . . . . 29
RESET input . . . . . . . . . . . . . . . . . . . . . . . . . 29
Software reset . . . . . . . . . . . . . . . . . . . . . . . . 30
Interrupt output. . . . . . . . . . . . . . . . . . . . . . . . 30
Phase sequence generator . . . . . . . . . . . . . . 31
One-phase drive (wave drive) . . . . . . . . . . . . 31
Two-phase drive. . . . . . . . . . . . . . . . . . . . . . . 32
Half-step drive
(one-phase and two-phase on) . . . . . . . . . . . 32
Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
START and STOP conditions. . . . . . . . . . . . . 34
System configuration . . . . . . . . . . . . . . . . . . . 34
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 35
Stepper motor coil driver considerations . . . . 36
Considerations when using GPIO pins
P0 to P3 as inputs . . . . . . . . . . . . . . . . . . . . . 37
Priority of ramp control, interrupt-based
control, loop delay and hard stop. . . . . . . . . . 37
Fm+ I
2
C-bus stepper motor controller
2
C-bus . . . . . . . . . . . . 34
PCA9629
© NXP B.V. 2012. All rights reserved.
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