PCA9629PW,118 NXP Semiconductors, PCA9629PW,118 Datasheet - Page 8

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PCA9629PW,118

Manufacturer Part Number
PCA9629PW,118
Description
Motor / Motion / Ignition Controllers & Drivers I2C-bus Stepper motor controller
Manufacturer
NXP Semiconductors
Type
Stepper Motor Controllerr
Datasheet

Specifications of PCA9629PW,118

Rohs
yes
Product
Stepper Motor Controllers / Drivers
Operating Supply Voltage
4.5 V to 5.5 V
Supply Current
6 mA
Mounting Style
SMD/SMT
Package / Case
TSSOP-16
Factory Pack Quantity
2500
NXP Semiconductors
PCA9629
Product data sheet
7.3.1.1 Disable interrupt output pin (bit 5)
7.3.1.2 Outputs change on STOP (bit 4)
7.3.1 MODE — Mode register
Table 6.
Legend: * default value.
This feature is useful when the host/micro/master does not want the INT pin to toggle
when interrupts occur. Within PCA9629, when interrupts are enabled and interrupt event
occurs, the actions related to the interrupt event are still carried out. However, if bit 5 = 1,
the INT pin does not show the activation of interrupt because the pin is disabled. If
bit 5 = 0, the micro sees the actual status of the INT pin.
The only exception to this rule is when the watchdog timer is enabled in the ‘Interrupt and
Reset’ mode (see
watchdog timer times out (even though bit 5 of this register is a ‘1’). This is because in the
‘Interrupt and Reset mode’ the part gets reset (and hence bit 5 is cleared) when the timer
times out.
This feature can be used to synchronize the starting of the motor across multiple
PCA9629 devices on the bus at approximately the same time (within few microseconds of
one another). The host controller can program all the PCA9629s on the bus and then
issue the I
devices on the bus start generating pulse sequences required to turn the motor. This
feature is applicable only to the motor coil outputs of the device namely, OUT0 to OUT3.
It is not applicable to the general purpose I/Os (P0 to P3).
Address
00h
2
MODE - Mode register (address 00h) bit description
C-bus STOP command. Upon receiving the STOP command, all the PCA9629
Register
MODE
All information provided in this document is subject to legal disclaimers.
Section
Rev. 1 — 29 February 2012
Bit
7
6
5
4
3
2
1
0
7.3.4.2). In this case, the interrupt line toggles when the
-
R/W
R/W
R/W
Access
-
R/W
R/W
R/W
Value
0*
0*
1
0*
1
0*
1
0*
1
0*
1
0*
1*
0
Description
not used
not used
Disable INT output pin
Enable INT output pin
outputs change on I
outputs change on I
PCA9629 responds to I
PCA9629 does not respond to I
subaddress 1
PCA9629 responds to I
PCA9629 does not respond to I
subaddress 2
PCA9629 responds to I
PCA9629 does not respond to I
subaddress 3
PCA9629 responds to All Call I
address
PCA9629 does not respond to All Call
I
2
Fm+ I
C-bus address
2
C-bus stepper motor controller
2
2
C-bus ACK
C-bus STOP command
2
2
2
PCA9629
C-bus subaddress 1
C-bus subaddress 2
C-bus subaddress 3
© NXP B.V. 2012. All rights reserved.
2
2
2
2
C-bus
C-bus
C-bus
C-bus
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