MCIMX255AJM4AR2 Freescale Semiconductor, MCIMX255AJM4AR2 Datasheet - Page 18

• Manufacturer Part Number: MCIMX255AJM4AR2
• Description: Processors - Application Specialized IMX25 1.2 AUTO
• Manufacturer: Freescale Semiconductor

Specifications of MCIMX255AJM4AR2

• Core: ARM926EJ-S
• Processor Series: MCIMX25
• Maximum Clock Frequency: 400 MHz
• Instruction / Data Cache Memory: 16 KB
• Data Ram Size: 128 KB
• Operating Supply Voltage: 1.15 V to 1.52 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-400
• Interface Type: USB
• Memory Type: DDR2
• Minimum Operating Temperature: - 40 C

In addition, the following power-down sequence is recommended:
3.3
Table 15
and temperature conditions. These values are derived from the i.MX25 with core clock speed up to
400 MHz. Additionally, no power saving techniques such as clock gating were implemented when
measuring these values. Common supplies are bundled according to the i.MX25 power-up sequence
requirements. Peak numbers are provided for system designers so that the i.MX25 power supply
requirements are satisfied during startup and transient conditions. Freescale recommends that system
current measurements are taken with customer-specific use-cases to reflect the normal operating
conditions in the end system.
18
QVDD
NVCC_EMI1, NVCC_EMI2
NVCC_CRM, NVCC_SDIO, NVCC_CSI,
NVCC_NFC, NVCC_JTAG, NVCC_LCDC,
NVCC_MISC
MPLL_VDD, UPLL_VDD
USBPHY1_VDDA_BIAS, USBPHY1_UPLL_VDD,
USBPHY1_VDDA, USBPHY2_VDD,
OSC24M_VDD, NVCC_ADC
6. Negate the POR signal for at least 90 s after all previous steps.
1. Turn off power for analog parts, including USBPHY1_VDDA_BIAS, USBPHY1_UPLL_VDD,
2. Turn off QVDD.
3. Turn off NVCCx, PLL, OSC, and other powers.
USBPHY1_VDDA, USBPHY2_VDD, NVCC_ADC, and FUSEVDD (FUSEVDD is tied to GND
if fuses are not programmed).
shows values representing maximum current numbers for the i.MX25 under worst case voltage
Power Characteristics
This is to guarantee that analog peripherals can get properly initialized
(reset) values from QVDD domain and NVCCx domain.
•
•
The power-down steps can be executed simultaneously, or very shortly one
after another.
Power Supply
This is to guarantee that both POR logic and clocks are stable inside the
i.MX25 chip, before POR is removed.
The dV/dT should be no faster than 0.25 V/us for all power supplies, to
avoid triggering ESD circuit.
i.MX25 Applications Processor for Automotive Products, Rev. 9
Table 15. Power Consumption
NOTE
NOTE
NOTE
Voltage (V)
1.52
1.65
1.9
3.6
3.3
Max Current (mA)
Freescale Semiconductor
360
110
30
20
40