MCIMX255AJM4AR2 Freescale Semiconductor, MCIMX255AJM4AR2 Datasheet - Page 9

• Manufacturer Part Number: MCIMX255AJM4AR2
• Description: Processors - Application Specialized IMX25 1.2 AUTO
• Manufacturer: Freescale Semiconductor

Specifications of MCIMX255AJM4AR2

• Core: ARM926EJ-S
• Processor Series: MCIMX25
• Maximum Clock Frequency: 400 MHz
• Instruction / Data Cache Memory: 16 KB
• Data Ram Size: 128 KB
• Operating Supply Voltage: 1.15 V to 1.52 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-400
• Interface Type: USB
• Memory Type: DDR2
• Minimum Operating Temperature: - 40 C

2.1
Special signal considerations are listed in
“Package Information and Contact
Freescale Semiconductor
TSC (and ADC) Touchscreen
.
Mnemonic
USBHOST
EXT_ARMCLK
USBOTG
UART(5)
SSI(2)
Block
SLCD
SPBA
BAT_VDD
CLK_SEL
Signal
CLK0
Special Signal Considerations
Smart LCD
controller
peripheral bus
arbiter
interface
controller (and
A/D converter)
UART
interface
High-speed
USB
on-the-go
Shared
I2S/SSI/AC97
Block Name
DryIce backup power supply input.
Clock-out pin; renders the internal clock visible to users for debugging. The clock source is controllable
through CRM registers. This pin can also be configured (through muxing) to work as a normal GPIO.
Used to select the ARM clock source from MPLL out or from external EXT_ARMCLK. In normal operation,
CLK_SEL should be connected to GND.
Primarily for Freescale factory use. There is no internal on-chip pull-up/down on this pin, so it must be
externally connected to GND or VDD. Aside from factory use, this pin can also be configured (through
muxing) to work as a normal GPIO.
i.MX25 Applications Processor for Automotive Products, Rev. 9
Table 3. i.MX25 Digital and Analog Modules (continued)
Multimedia
peripherals
System control The SPBA controls access to the shared peripherals. It supports shared
Connectivity
peripherals
Multimedia
peripherals
Connectivity
peripherals
Connectivity
peripherals
Subsystem
Assignment.”
Table 4. Signal Considerations
Table
The SLCDC module transfers data from the display memory buffer to the
external display device.
peripheral ownership and access rights to an owned peripheral.
The SSI is a full-duplex serial port that allows the processor to communicate
with a variety of serial protocols, including the Freescale Semiconductor SPI
standard and the inter-IC sound bus standard (I2S). The SSIs
interface to the AUDMUX for flexible audio routing.
The touchscreen controller and associated Analog-to-Digital Converter
(ADC) together provide a resistive touchscreen solution. The module
implements simultaneous touchscreen control and auxiliary ADC operation
for temperature, voltage, and other measurement functions.
Each of the UART modules supports the following serial data
transmit/receive protocols and configurations:
The USB module provides high-performance USB On-The-Go (OTG) and
host functionality (up to 480 Mbps), compliant with the USB 2.0 specification,
the OTG supplement, and the ULPI 1.0 Low Pin Count specification. The
module has DMA capabilities for handling data transfer between internal
buffers and system memory. An OTG HS PHY and HOST FS PHY are also
integrated.
• 7- or 8-bit data words, one or two stop bits, programmable parity (even,
• Programmable baud rates up to 4 MHz. This is a higher maximum baud
• IrDA-1.0 support (up to SIR speed of 115200 bps)
• Option to operate as 8-pins full UART, DCE, or DTE
odd, or none)
rate than the 1.875 MHz specified by the TIA/EIA-232-F standard and
previous Freescale UART modules. 32-byte FIFO on Tx and 32 half-word
FIFO on Rx supporting auto-baud
4. The package contact assignment is found in
Signal descriptions are provided in the reference manual.
Description
Brief Description
Section 4,
9