MCIMX255AJM4AR2 Freescale Semiconductor, MCIMX255AJM4AR2 Datasheet - Page 64

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MCIMX255AJM4AR2

Manufacturer Part Number
MCIMX255AJM4AR2
Description
Processors - Application Specialized IMX25 1.2 AUTO
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MCIMX255AJM4AR2

Core
ARM926EJ-S
Processor Series
MCIMX25
Maximum Clock Frequency
400 MHz
Instruction / Data Cache Memory
16 KB
Data Ram Size
128 KB
Operating Supply Voltage
1.15 V to 1.52 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-400
Interface Type
USB
Memory Type
DDR2
Minimum Operating Temperature
- 40 C
1
64
These values are for a DQ/DM slew rate of 1 V/ns and a DQS slew rate of 1 V/ns. For additional values use
DtDH1 Derating Values for DDR2-400, DDR2-533.”
DDR17
DDR18
DDR19
DDR20
DDR21
DDR22
DDR23
ID
DQ & DQM setup time to DQS (single-ended strobe)
DQ & DQM hold time to DQS (single-ended strobe)
Write cycle DQS falling edge to SDCLK output setup time
Write cycle DQS falling edge to SDCLK output hold time
DQS latching rising transitions to associated clock edges
DQS high-level width
DQS low-level width
DQM (output)
DQS (output)
DQ (output)
SDCLK_B
SDCLK
2.0 V/ns
S1
Table 53. tDS1, tDH1 Derating Values for DDR2-400, DDR2-533
tD
H1
tD
i.MX25 Applications Processor for Automotive Products, Rev. 9
Figure 32. DDR2 SDRAM Write Cycle Timing Diagram
Table 52. DDR2 SDRAM Write Cycle Parameter Table
1.5 V/ns
S1
tD
DDR21
DDR17
DDR17
H1
tD
Parameter
S1
1.0 V/ns
tD
Data
DM
H1
tD
DDR18
DDR18
Data
DM
0.9 V/ns
S1
tD
DQS Single-Ended Slew Rate
H1
DDR17
tD
DDR17
Data
DM
1
1
DDR22
0.8 V/ns
S1
tD
Data
DM
H1
tD
DDR23
S1
DDR18
0.7 V/ns
DDR18
tD
t
t
Symbol
DH1(base)
Data
DS1(base)
DM
t
t
t
t
DQSS
DQSH
t
DQSL
DSS
DSH
H1
tD
S1
0.6 V/ns
Data
DM
tD
DDR19
0.025
0.025
H1
-0.25
Min.
0.35
0.35
tD
0.2
0.2
1,2,3
DDR2-400
Freescale Semiconductor
Data
DM
S1
0.5 Vns
tD
Table
Max.
0.25
H1
Data
DM
tD
DDR20
53, “DtDS1,
S1
0.4 V/ns
tD
Unit
tCK
tCK
tCK
tCK
tCK
ns
ns
H1
tD

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