MCIMX255AJM4AR2 Freescale Semiconductor, MCIMX255AJM4AR2 Datasheet - Page 45

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MCIMX255AJM4AR2

Manufacturer Part Number
MCIMX255AJM4AR2
Description
Processors - Application Specialized IMX25 1.2 AUTO
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MCIMX255AJM4AR2

Core
ARM926EJ-S
Processor Series
MCIMX25
Maximum Clock Frequency
400 MHz
Instruction / Data Cache Memory
16 KB
Data Ram Size
128 KB
Operating Supply Voltage
1.15 V to 1.52 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-400
Interface Type
USB
Memory Type
DDR2
Minimum Operating Temperature
- 40 C
Figure 12
To meet PIO write mode timing requirements, a number of timing parameters must be controlled.
shows timing parameters and their determining relations, and indicates parameters that can be adjusted to
meet required conditions.
1
Freescale Semiconductor
Parameter
See
ATA
tA
t1
t2
t9
t3
t4
t0
Figure
gives timing waveforms for PIO write mode.
Mode Timing
12.
Parameter
PIO Write
t2w
tA
t1
t9
t4
Write Data(15:0)
1
ADDR
(See note 1)
buffer_en
i.MX25 Applications Processor for Automotive Products, Rev. 9
t1(min.) = time_1
t2(min.) = time_2w
t9(min.) = time_9
t3(min.) = (time_2w – time_on)
t4(min.) = time_4
tA = (1.5 + time_ax) T – (tco + tsui + tcable2 + tcable2 + 2
t0(min.) = (time_1 + time_2 + time_9)
Avoid bus contention when switching buffer on by making ton long
enough
Avoid bus contention when switching buffer off by making toff long
enough
DIOR
DIOW
IORDY
IORDY
Table 37. Timing Parameters for PIO Write Mode
Figure 12. PIO Write Mode Timing
T – (tskew1 + tskew2 + tskew5)
T – (tskew1 + tskew2 + tskew6)
T – tskew1
T – (tskew1 + tskew2 + tskew5)
t1
Relation
ton
tA
T – (tskew1 + tskew2 +tskew5)
T
t2w
tB
t4 toff
t9
tbuf)
t1
if not met, increase time_2w
Adjustable Parameter(s)
time_1, time_2r, time_9
time_2w
time_ax
time_9
time_4
time_1
Table 37
45

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