AT89LP51ED2-20MU Atmel, AT89LP51ED2-20MU Datasheet - Page 22

• Manufacturer Part Number: AT89LP51ED2-20MU
• Description: 8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
• Manufacturer: Atmel

Specifications of AT89LP51ED2-20MU

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: VQFN-44
• Mounting Style: SMD/SMT
• Data Rom Size: 4 KB
• Interface Type: 2-Wire, SPI, UART
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Processor Series: AT89x
• Program Memory Type: Flash
• Factory Pack Quantity: 360

3.4
Table 3-4.
3.5
22
Symbol
PAGE
PAGE = F6H
Not Bit Addressable
Bit
7-0
Extra RAM (EDATA)
EEPROM
AT89LP51RD2/ED2/ID2 Preliminary
Function
Selects which 256-byte page of EDATA is currently accessible by MOVX @Ri instructions when PAGE < 08H. Any PAGE
value between 08H and FFH will selected XDATA; however, this value will not be output on P2.
PAGE
—
7
– EDATA Page Register
Figure 3-15. MOVX with Three Wait States (WS = 11B)
The Extra RAM is a portion of the external memory space implemented as an internal 2K byte
auxiliary RAM. The Extra RAM is mapped into the EDATA space at the bottom of the external
memory address space, from 0000H to 07FFH, when EXTRAM = 0 (AUXR.1). The size of
EDATA can be reduced by the XRS bits in AUXR (See
address range will access the internal Extra RAM. EDATA can be accessed with both 16-bit
(MOVX @DPTR) and 8-bit (MOVX @Ri) addresses. When 8-bit addresses are used, the PAGE
register (0F6H) supplies the upper address bits. The PAGE register breaks EDATA into eight
256-byte pages. A page cannot be specified independently for MOVX @R0 and MOVX @R1.
Setting PAGE above 07H enables XDATA access, but does not change the value of Port 2.
When 16-bit addresses are used (DPTR), the EEE bit (EECON.1) must also be zero to access
EDATA. MOVX instructions to EDATA require a minimum of 2 clock cycles.
The EEPROM is a portion of the external data memory space implemented as an on-chip non-
volatile data memory. EEPROM is enabled by setting the EEE bit (EEMCON.1) to one. When
EXTRAM = 0 and EE = 1, the EEPROM is mapped into the FDATA space, at the bottom of the
external memory address space, from 0000H to 0FFFH. (See
this address range will access the EEPROM. EEPROM is not accessible while EEE = 0.
EEPROM can be accessed only by 16-bit (MOVX @DPTR) addresses. MOVX @Ri instructions
to the EEPROM address range will access data memory in the EDATA or XDATA spaces.
Addresses above the EEPROM range are mapped to external data memory (XDATA).
This feature is only available on AT89LP51ED2 and AT89LP51ID2.
CLK
ALE
WR
RD
P2
P0
P0
—
6
P2 SFR
P0 SFR
P0 SFR
S1
—
DPL OUT
DPL OUT
5
S2
S3
—
4
W1
DPH or P2 OUT
PAGE.3
DATA OUT
FLOAT
W2
3
W3
PAGE.2
2
Table
S4
Figure
3-3). MOVX instructions to this
Reset Value = 0000 0000B
P2 SFR
P0 SFR
P0 SFR
PAGE.1
3-6). MOVX instructions to
1
PAGE.0
3714A–MICRO–7/11
0