AT89LP51ED2-20MU Atmel, AT89LP51ED2-20MU Datasheet - Page 75

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AT89LP51ED2-20MU

Manufacturer Part Number
AT89LP51ED2-20MU
Description
8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
Manufacturer
Atmel
Datasheet

Specifications of AT89LP51ED2-20MU

Rohs
yes
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
64 KB
Data Ram Size
256 B
On-chip Adc
Yes
Operating Supply Voltage
2.4 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
VQFN-44
Mounting Style
SMD/SMT
Data Rom Size
4 KB
Interface Type
2-Wire, SPI, UART
Number Of Programmable I/os
36
Number Of Timers
3
Processor Series
AT89x
Program Memory Type
Flash
Factory Pack Quantity
360
12.3
12.4
3714A–MICRO–711
Port Read-Modify-Write
Port Alternate Functions
Digital inputs on P2.4, P2.5, P2.6 and P2.7 are disabled whenever an analog comparator is
enabled by setting the CENA or CENB bits in ACSRA and ACSRB and that pin is configured for
input-only mode. To use an analog input pin as a high-impedance digital input while a compara-
tor is enabled, that pin should be configured in open-drain mode and the corresponding port
register bit should be set to 1.
Digital inputs on Port 0 are disabled for each pin configured for input-only mode whenever the
ADC is enabled by setting the ADCE bit and clearing the DAC bit in DADC. To use any Port 0
input pin as a high-impedance digital input while the ADC is enabled, that pin should be config-
ured in open-drain mode and the corresponding port register bit should be set to 1. When DAC
mode is enabled, P2.2 and P2.3 are forced to input-only mode.
A read from a port will read either the state of the pins or the state of the port register depending
on which instruction is used. Simple read instructions will always access the port pins directly.
Read-modify-write instructions, which read a value, possibly modify it, and then write it back, will
always access the port register. This includes bit write instructions such as CLR or SETB as they
actually read the entire port, modify a single bit, then write the data back to the entire port. See
Table 12-5
Table 12-5.
Most general-purpose digital I/O pins of the AT89LP51RD2/ED2/ID2 share functionality with the
various I/Os needed for the peripheral units.
pins. Alternate functions are connected to the pins in a logic AND fashion. In order to enable the
alternate function on a port pin, that pin must have a “1” in its corresponding port register bit,
otherwise the input/output will always be “0”. However, alternate functions may be temporarily
forced to “0” by clearing the associated port bit, provided that the pin is not in input-only mode.
Furthermore, each pin must be configured for the correct input/output mode as required by its
peripheral before it may be used as such.
use with an alternate function. If two or more port pins on the same 8-bit require difference direc-
tions, the port must be configured for bidirectional operation.
Mnemonic
ANL
ORL
XRL
JBC
CPL
INC
DEC
DJNZ
MOV PX.Y, C
CLR PX.Y
SETB PX.Y
for a complete list of Read-Modify-Write instruction which may access the ports.
Port Read-Modify-Write Instructions
Instruction
Logical AND
Logical OR
Logical EX-OR
Jump if bit set and clear bit
Complement bit
Increment
Decrement
Decrement and jump if not zero
Move carry to bit Y of Port X
Clear bit Y of Port X
Set bit Y of Port X
AT89LP51RD2/ED2/ID2 Preliminary
Table 12-6
Table 12-7
shows how to configure a generic pin for
lists the alternate functions of the port
Example
ANL P1, A
ORL P1, A
XRL P1, A
JBC P3.0, LABEL
CPL P3.1
INC P1
DEC P3
DJNZ P3, LABEL
MOV P1.0, C
CLR P1.1
SETB P3.2
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