AT25DF081-SSHN-B Atmel, AT25DF081-SSHN-B Datasheet - Page 16

• Manufacturer Part Number: AT25DF081-SSHN-B
• Description: IC FLASH 8MBIT 66MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT25DF081-SSHN-B

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 8M (4096 pages x 256 bytes)
• Speed: 66MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 7ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 1.65V
• Operating Supply Voltage (max): 1.95V
• Supply Current: 12mA
• Mounting: Surface Mount
• Pin Count: 8
• Architecture: Sectored
• Supply Voltage (max): 1.95 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Current: 12 mA
• Mounting Style: SMD/SMT
• Organization: 64 KB x 16
• Memory Configuration: 4096 Pages X 256 Bytes
• Clock Frequency: 66MHz
• Supply Voltage Range: 1.65V To 1.95V
• Memory Case Style: SOIC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16
AT25DF081
Table 9-2.
Essentially, if the SPRL bit of the Status Register is in the logical “0” state (Sector Protection
Registers are not locked), then writing a 00h to the Status Register will perform a Global Unpro-
tect without changing the state of the SPRL bit. Similarly, writing a 7Fh to the Status Register will
perform a Global Protect and keep the SPRL bit in the logical “0” state. The SPRL bit can, of
course, be changed to a logical “1” by writing an FFh if software-locking or hardware-locking is
desired along with the Global Protect.
State
WP
0
0
1
1
Current
SPRL
Value
0
1
0
1
Valid SPRL and Global Protect/Unprotect Conditions
Register Data
7 6 5 4 3 2 1 0
0 x 0 0 0 0 x x
0 x 0 0 0 1 x x
0 x 1 1 1 0 x x
0 x 1 1 1 1 x x
1 x 0 0 0 0 x x
1 x 0 0 0 1 x x
1 x 1 1 1 0 x x
1 x 1 1 1 1 x x
0 x 0 0 0 0 x x
0 x 0 0 0 1 x x
0 x 1 1 1 0 x x
0 x 1 1 1 1 x x
1 x 0 0 0 0 x x
1 x 0 0 0 1 x x
1 x 1 1 1 0 x x
1 x 1 1 1 1 x x
0 x 0 0 0 0 x x
0 x 0 0 0 1 x x
0 x 1 1 1 0 x x
0 x 1 1 1 1 x x
1 x 0 0 0 0 x x
1 x 0 0 0 1 x x
1 x 1 1 1 0 x x
1 x 1 1 1 1 x x
x x x x x x x x
Write Status
New
Bit
↕
↕
↕
↕
↕
↕
Protection Operation
Global Unprotect – all Sector Protection Registers reset to 0
No change to current protection.
No change to current protection.
No change to current protection.
Global Protect – all Sector Protection Registers set to 1
Global Unprotect – all Sector Protection Registers reset to 0
No change to current protection.
No change to current protection.
No change to current protection.
Global Protect – all Sector Protection Registers set to 1
No change to the current protection level. All sectors currently
protected will remain protected and all sectors currently unprotected
will remain unprotected.
The Sector Protection Registers are hard-locked and cannot be
changed when the WP pin is LOW and the current state of SPRL is 1.
Therefore, a Global Protect/Unprotect will not occur. In addition, the
SPRL bit cannot be changed (the WP pin must be HIGH in order to
change SPRL back to a 0).
Global Unprotect – all Sector Protection Registers reset to 0
No change to current protection.
No change to current protection.
No change to current protection.
Global Protect – all Sector Protection Registers set to 1
Global Unprotect – all Sector Protection Registers reset to 0
No change to current protection.
No change to current protection.
No change to current protection.
Global Protect – all Sector Protection Registers set to 1
No change to the current protection level. All sectors
currently protected will remain protected, and all sectors
currently unprotected will remain unprotected.
The Sector Protection Registers are soft-locked and cannot
be changed when the current state of SPRL is 1. Therefore,
a Global Protect/Unprotect will not occur. However, the
SPRL bit can be changed back to a 0 from a 1 since the WP
pin is HIGH. To perform a Global Protect/Unprotect, the
Write Status Register command must be issued again after
the SPRL bit has been changed from a 1 to a 0.
3674E–DFLASH–8/08
SPRL
Value
New
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1