STEVAL-IFW001V1 STMicroelectronics, STEVAL-IFW001V1 Datasheet - Page 101

• Manufacturer Part Number: STEVAL-IFW001V1
• Description: BOARD EVAL BASED ON STR912FA
• Manufacturer: STMicroelectronics

Specifications of STEVAL-IFW001V1

• Design Resources: STEVAL-IFW001V1 Gerber Files STEVAL-IFW001V1 Schematic STEVAL-IFW001V1 Bill of Material
• Main Purpose: Interface, Ethernet
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: E-STE101P, STR912FAW44
• Primary Attributes: Dual Ethernet Transceivers for Full Duplex Communication
• Secondary Attributes: Up to 32 MII Addresses, UART, I2C, SPI, with RJ45 Connectors
• Silicon Manufacturer: ST Micro
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: STR9
• Silicon Family Name: STR91x
• For Use With: 497-8263 - BOARD EXTENSION STEVAL-IFW001V1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8262

STR91xFAxxx
11
Revision history
Table 55.
09-May-2007
14-May-2008
26-Nov-2007
22-Dec-2008
17-Jul-2008
02-Jul-2009
Date
Document revision history
Revision
1
2
3
4
5
6
Doc ID 13495 Rev 6
Initial release
Updated Standby current in
characteristics on page 64
Added
Added
Updated
Added
Added
Added min/max values for E, D, E1, D1 in
Added 1MB and 2M devices, creating merged datasheet from
seperate STR91xFAx32, 42, 44, 46 and 47 devices.
Added STR912FAW32 to
Added paragraph on voltage supply shutdown in
page 24
Removed DMA feature for I2C in
Updated Sleep mode current in
on page 60
Added
Updated operating conditions for V
on page 61
Changed SPI master t
page 88
Updated
Updated
Updated I
page 64
Updated
Updated
Updated
Section 3.13.7: Tamper
“Normally Closed/Tamper Open mode”.
Table 31: I/O
Section 7.1: Parameter conditions on page 58
Section 7.7.2: X1_CPU external clock source on page 67
Figure 14: LVD reset delay case 3 on page 63
Table 48
Table 16: Typical current consumption at 25 °C on page 65
Section 7.11: External memory bus timings on page 76
Section 3.10.6 on page 22
Table 11: Operating conditions on page 61
Table 17: Internal clock frequencies on page 66
Table 31: I/O characteristics on page 75
Section 7.7.3 on page
SLEEP(IDDQ)
and
characteristics: Updated V
and
Section 7.7 on page 66
Table 49
in
SU
detection: Removed information about
Table 15: Supply current characteristics on
and t
Table 1: Device summary on page 1
Table 15: Supply current
Changes
in ADC characteristics section
H to
68. Small text changes.
Table 10: Current characteristics
Section 3.21 on page 33
TBD in
DD
and f
HYS
Section Table 46. on
Figure 41 on page 96
CPUCLK
row.
Revision history
Section 3.12 on
in
Section 7.3
101/102