STEVAL-IFW001V1 STMicroelectronics, STEVAL-IFW001V1 Datasheet - Page 60

• Manufacturer Part Number: STEVAL-IFW001V1
• Description: BOARD EVAL BASED ON STR912FA
• Manufacturer: STMicroelectronics

Specifications of STEVAL-IFW001V1

• Design Resources: STEVAL-IFW001V1 Gerber Files STEVAL-IFW001V1 Schematic STEVAL-IFW001V1 Bill of Material
• Main Purpose: Interface, Ethernet
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: E-STE101P, STR912FAW44
• Primary Attributes: Dual Ethernet Transceivers for Full Duplex Communication
• Secondary Attributes: Up to 32 MII Addresses, UART, I2C, SPI, with RJ45 Connectors
• Silicon Manufacturer: ST Micro
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: STR9
• Silicon Family Name: STR91x
• For Use With: 497-8263 - BOARD EXTENSION STEVAL-IFW001V1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8262

Electrical characteristics
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Table 10.
1. The user can use GPIOs to source or sink current. In this case, the user must ensure that these absolute
2. All 3.3 V or 5.0 V power (V
3. I
4. When several inputs are submitted to a current injection, the maximum ΣI
ΣI
max. values are not exceeded (taking into account the RUN power consumption).
must always be connected to the external 3.3V or 5.0V supply.
cannot be respected, the injection current must be limited externally to the I
injection is induced by V
positive and negative injected currents (instantaneous values). These results are based on
characterization with ΣI
INJ(PIN)
I
I
I
INJ(PIN)
Symbol
VDD_IO
VSS_IO
INJ(PIN)
I
IO
must never be exceeded. This is implicitly insured if V
(1)
(1)
(3)
(3)
Current characteristics
Total current into V
Total current out of V
Output current sunk by any I/O and control pin
Output current source by any I/Os and control pin
Injected current on any pin during overload condition
Absolute sum of all input currents during overload condition
(4)
INJ(PIN)
IN
>V
DD_IO
DD
maximum current injection on four I/O port pins of the device.
while a negative injection is induced by V
, V
Doc ID 13495 Rev 6
DDA_ADC
DD_IO
SS
, V
ground lines (sink)
power lines (source)
Ratings
DDA_PLL
) and ground (V
IN
maximum is respected. If V
(2)
(2)
SS_IO
INJ(PIN)
IN
<V
INJ(PIN)
, V
(4)
SS
SSA_ADC
.
is the absolute sum of the
value. A positive
, V
Maximum
DDA_ADC
value
± 25
200
200
- 25
STR91xFAxxx
± 5
IN
25
maximum
) pins
Unit
mA
mA