DS26524DK Maxim Integrated Products, DS26524DK Datasheet - Page 253

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DS26524DK

Manufacturer Part Number
DS26524DK
Description
KIT DESIGN FOR DS26524
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS26524DK

Main Purpose
Telecom, Framer and Line Interface Units (LIUs)
Utilized Ic / Part
DS26524
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Table 12-2. Receiver AC Characteristics
(V
Figure
RCLK Period
RCLK Pulse Width
RSYSCLK Period
RSYSCLK Pulse Width
RSYNC Setup to RSYSCLK Falling
RSYNC Pulse Width
Delay RCLK to RSER, RSIG Valid
Delay RCLK to RCHCLK, RSYNC,
RCHBLK, RFSYNC
Delay RSYSCLK to RSER, RSIG
Valid
Delay RSYSCLK to RCHCLK,
RCHBLK, RMSYNC, RSYNC
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
DD
= 3.3V ±5%, T
12-7.)
The timing parameters in this table are guaranteed by design (GBD).
T1 Mode.
E1 Mode.
RSYSCLK = 1.544MHz.
RSYSCLK = 2.048MHz.
PARAMETER
A
= -40°C to +85°C for DS26524GN.) (Note 1) (See
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
PW
CH
CP
CL
SP
SH
SL
SU
D1
D2
D3
D4
253 of 273
(Note 2)
(Note 3)
(Note 4)
(Note 5)
CONDITIONS
MIN
DS26524 Quad T1/E1/J1 Transceiver
125
125
Figure
60
60
30
30
20
50
12-5,
TYP
648
488
648
488
Figure
t
MAX
SH
50
50
50
50
- 5
12-6, and
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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