DS26524DK Maxim Integrated Products, DS26524DK Datasheet - Page 256

• Manufacturer Part Number: DS26524DK
• Description: KIT DESIGN FOR DS26524
• Manufacturer: Maxim Integrated Products

Specifications of DS26524DK

• Main Purpose: Telecom, Framer and Line Interface Units (LIUs)
• Utilized Ic / Part: DS26524
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 12-3. Transmit AC Characteristics
(V
Figure
TCLK Period
TCLK Pulse Width
TSYSCLK Period
TSYSCLK Pulse Width
TSYNC or TSSYNCIO Setup to TCLK
or TSYSCLK falling
TSYNC or TSSYNCIO Pulse Width
TSSYNCIO Pulse Width (Notes 7, 8)
TSER, TSIG Setup to TCLK,
TSYSCLK Falling
TSER, TSIG Hold from TCLK,
TSYSCLK Falling
Delay TCLK to TCHBLK, TCHCLK,
TSYNC
Delay TSYSCLK to TCHCLK, TCHBLK
Delay BPCLK to TSSYNCIO (Note 7)
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
DD
= 3.3V ±5%, T
12-10, and
The timing parameters in this table are guaranteed by design (GBD).
T1 Mode.
E1 Mode.
RSYSCLK = 1.544MHz.
RSYSCLK = 2.048MHz.
TSSYNCIO configured as an input (GTCR2.1 = 0).
TSSYNCIO configured as an output (GTCR2.1 = 1).
Varies depending on the frequency of BPCLK.
PARAMETER
Figure
A
= -40°C to +85°C for DS26524GN.) (Note 1) (See
12-11.)
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PW
PW
CP
CH
CL
SP
SH
SU
SU
HD
D2
D3
D5
SL
256 of 273
(Note 2)
(Note 3)
(Note 4)
(Note 5)
(Note 6)
CONDITIONS
MIN
125
125
488
244
122
60
60
30
30
20
50
61
20
20
DS26524 Quad T1/E1/J1 Transceiver
Figure
12-8,
TYP
648
488
648
448
Figure
t
t
MAX
CH
SH
50
50
or
5
- 5
- 5
12-9,
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns