EVAL-ADUC812QS Analog Devices Inc, EVAL-ADUC812QS Datasheet - Page 33

KIT DEV FOR ADUC812 QUICK START

EVAL-ADUC812QS

Manufacturer Part Number
EVAL-ADUC812QS
Description
KIT DEV FOR ADUC812 QUICK START
Manufacturer
Analog Devices Inc
Series
QuickStart™ Kitr
Type
MCUr
Datasheet

Specifications of EVAL-ADUC812QS

Rohs Status
RoHS non-compliant
Contents
Evaluation Board, Power Supply, Cable, Software and Documentation
For Use With/related Products
ADuC812
T2CON
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
Timer/Counter 2 Data Registers
Timer/Counter 2 also has two pairs of 8-bit data registers
associated with it. These are used as both timer data registers
and timer capture/reload registers.
TH2 and TL2
Timer 2, data high byte and low byte.
SFR Address = CDH, CCH, respectively.
RCAP2H and RCAP2L
Timer 2, Capture/Reload high byte and low byte.
SFR Address = CBH, CAH, respectively.
REV. E
T
F
2
Name
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
CNT2
CAP2
E
X
F
2
Timer/Counter 2
Control Register
C8H
00H
Yes
Description
Timer 2 Overflow Flag.
Set by hardware on a Timer 2 overflow. TF2 will not be set when either RCLK = 1 or TCLK = 1.
Cleared by user software.
Timer 2 External Flag.
Set by hardware when either a capture or reload is caused by a negative transition on T2EX and
EXEN2 = 1.
Cleared by user software.
Receive Clock Enable Bit.
Set by user to enable the serial port to use Timer 2 overflow pulses for its receive clock in serial port
Modes 1 and 3.
Cleared by user to enable Timer 1 overflow to be used for the receive clock.
Transmit Clock Enable Bit.
Set by user to enable the serial port to use Timer 2 overflow pulses for its transmit clock in serial
port Modes 1 and 3.
Cleared by user to enable Timer 1 overflow to be used for the transmit clock.
Timer 2 External Enable Flag.
Set by user to enable a capture or reload to occur as a result of a negative transition on T2EX if
Timer 2 is not being used to clock the serial port.
Cleared by user for Timer 2 to ignore events at T2EX.
Timer 2 Start/Stop Control Bit.
Set by user to start Timer 2.
Cleared by user to stop Timer 2.
Timer 2 Timer or Counter Function Select Bit.
Set by the user to select counter function (input from external T2 pin).
Cleared by the user to select timer function (input from on-chip core clock).
Timer 2 Capture/Reload Select Bit.
Set by user to enable captures on negative transitions at T2EX if EXEN2 = 1.
Cleared by user to enable autoreloads with Timer 2 overflows or negative transitions at T2EX
when EXEN2 = 1. When either RCLK = 1 or TCLK = 1, this bit is ignored and the timer is
forced to autoreload on Timer 2 overflow.
R
C
L
K
Table XVII. T2CON SFR Bit Designations
T
C
L
K
–33–
E
X
E
N
2
T
R
2
C
N
T
2
ADuC812
C
A
P
2

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