C8051F410DK Silicon Laboratories Inc, C8051F410DK Datasheet - Page 123
![KIT DEV FOR C8051F41X](/photos/9/23/92324/c8051f410dk_sml.jpg)
C8051F410DK
Manufacturer Part Number
C8051F410DK
Description
KIT DEV FOR C8051F41X
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F410DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F41x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F410
Silicon Family Name
C8051F41x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F41x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1314
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F410DK
Manufacturer:
Silicon Labs
Quantity:
135
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14.2. 32-bit CRC Algorithm
The C8051F41x CRC unit calculates the 32-bit CRC using a poly of 0x04C11DB7. The CRC-32 algorithm
is "reflected", meaning that all of the input bytes and the final 32-bit output are bit-reversed in the process-
ing engine. The following is a description of a simplified CRC algorithm that produces results identical to
the hardware:
For example, the 32-bit 'F41x CRC algorithm can be described by the following code:
unsigned long UpdateCRC (unsigned long CRC_acc, unsigned char CRC_input)
{
}
The following table lists several input values and the associated outputs using the 32-bit 'F41x CRC algo-
rithm (an initial value of 0xFFFFFFFF is used):
unsigned char i; // loop counter
#define POLY 0xEDB88320 // bit-reversed version of the poly 0x04C11DB7
// Create the CRC "dividend" for polynomial arithmetic (binary arithmetic
// with no carries)
CRC_acc = CRC_acc ^ CRC_input;
// "Divide" the poly into the dividend using CRC XOR subtraction
// CRC_acc holds the "remainder" of each divide
//
// Only complete this division for 8 bits since input is 1 byte
for (i = 0; i < 8; i++)
{
}
// Return the final remainder (CRC value)
return CRC_acc;
// Check if the MSB is set (if MSB is 1, then the POLY can "divide"
// into the "dividend")
if ((CRC_acc & 0x00000001) == 0x00000001)
{
}
else
{
}
Step 1. XOR the least-significant byte of the current CRC result with the input byte. If this is the
Step 2. Right-shift the CRC result.
Step 3. If the LSB of the CRC result is set, XOR the CRC result with the reflected polynomial
Step 4. Repeat at Step 2 for the number of input bits (8).
// if so, shift the CRC value, and XOR "subtract" the poly
CRC_acc = CRC_acc >> 1;
CRC_acc ^= POLY;
// if not, just shift the CRC value
CRC_acc = CRC_acc >> 1;
first iteration of the CRC unit, the current CRC result will be the set initial value
(0x00000000 or 0xFFFFFFFF).
(0xEDB88320).
Rev. 1.1
C8051F410/1/2/3
123
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