Z8F083A0128ZCOG Zilog, Z8F083A0128ZCOG Datasheet - Page 85
Z8F083A0128ZCOG
Manufacturer Part Number
Z8F083A0128ZCOG
Description
KIT DEVELOPMENT F083A
Manufacturer
Zilog
Series
Z8 Encore! XP®r
Type
MCUr
Specifications of Z8F083A0128ZCOG
Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F083A
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4672
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Manufacturer
Quantity
Price
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Part Number:
Z8F083A0128ZCOG
Manufacturer:
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PS026308-1207
5. Write to the timer reload high and low byte registers to set the reload value (PWM
6. If appropriate, enable the timer interrupt and set the timer interrupt priority by writing
7. Configure the associated GPIO port pin for the timer output and timer output
8. Write to the timer control register to enable the timer and initiate counting.
The PWM period is represented by the following equation:
If an initial starting value other than
registers, the ONE-SHOT mode equation determines the first PWM time-out period.
If TPOL bit is set to 0, the ratio of the PWM output high time to the total period is
represented by:
PWM Output High Time Ratio (%)
If TPOL bit is set to 1, the ratio of the PWM output high time to the total period is
represented by:
CAPTURE Mode
In CAPTURE mode, the current timer count value is recorded when the appropriate
external timer input transition occurs. The capture count value is written to the timer
PWM high and low byte registers. The timer input is the system clock. The TPOL bit in
the timer control register determines if the capture occurs on a rising edge or a falling edge
of the timer input signal.
When the Capture event occurs, an interrupt is generated and the timer continues counting.
The INPCAP bit in TxCTL1 register is set to indicate the timer interrupt because of an
input Capture event.
PWM Output High Time Ratio (%)
PWM Period (s)
duration of the negative phase of the PWM signal (as defined by the difference
between the PWM registers and the timer reload registers).
period). The reload value must be greater than the PWM value.
to the relevant interrupt registers.
complement alternate functions. The timer output complement function is shared with
the timer input function for both timers. Setting the timer mode to dual PWM, will
automatically switch the function from timer-in to timer-out complement.
=
--------------------------------------------------------------------------- -
System Clock Frequency (Hz)
Reload Value
0001H
=
=
×
Reload Value PWM Value
----------------------------------------------------------------------- -
Prescale
--------------------------------- -
Reload Value
PWM Value
is loaded into the timer high and low byte
Reload Value
–
×
Z8 Encore!
100
Product Specification
®
×
F083A Series
100
Timers
73
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