AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 32
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AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
8.6
32
Slow Clock Selection
AT91SAM9G45
Figure 8-2.
The AT91SAM9G45 slow clock can be generated either by an external 32768Hz crystal or the
on-chip RC oscillator. The 32768 Hz crystal oscillator can be bypassed, by setting the bit
OSC32BYP, to accept an external slow clock on XIN32.
The internal RC oscillator and the 32768 Hz oscillator can be enabled by setting to 1 respec-
tively RCEN bit and OSC32EN bit in the system controller user interface. OSCSEL command
selects the slow clock source.
RCEN, OSC32EN,OSCSEL and OSC32BYP bits are located in the slow clock control register
(SCKCR) located at address 0xFFFFFD50 in the backup part of the system controller and so are
preserved while VDDBU is present.
Clock Generator Block Diagram
XOUT32
XIN32
XOUT
XIN
Clock Generator
Management
12M Main
PLLA and
Slow Clock
Controller
On Chip
RC OSC
Oscillator
Status
Oscillator
Divider
Power
UPLL
Control
RCEN
Slow Clock
SLCK
OSCSEL
OSC32EN
OSC32BYP
Main Clock
MAINCK
UPLLCK
PLLA Clock
PLLACK
6438ES–ATARM–21-Jun-10