HS0005KCU04H Renesas Electronics America, HS0005KCU04H Datasheet - Page 40

• Manufacturer Part Number: HS0005KCU04H
• Description: EMULATOR E10A-USB SUPERH RISC
• Manufacturer: Renesas Electronics America
• Type: In Circuit Debuggerr

Specifications of HS0005KCU04H

• Contents: Emulation Module
• For Use With/related Products: SH7205, SH7265
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2.6
The emulator uses the information on the stack to display the names of functions in the sequence
of calls that led to the function to which the program counter is currently pointing. This function
can be used only when the load module that has the Dwarf2-type debugging information is loaded.
For the usage of this function, refer to section 6.21 and 7.22 Stack Trace Function.
2.7
Some devices to be debugged open all interrupts while executing emulation to users. During a user
program break, it is possible to specify the mode whether or not the interrupt processing is
executed.
2.8
An online help explains the usage of each function or the command syntax that can be entered
from the command line window.
Select [Emulator Help] from the [Help] menu to view the emulator help.
Rev. 2.00 Nov. 19, 2009 Page 18 of 294
REJ10J1766-0200
3.
Stack Trace Function
User-interrupt Open Function during User Program Break
Online Help
memory. Therefore, an operation such as memory write or BREAKPOINT should be
set only for the RAM area and the internal flash memory. When the memory area can
be read by the MMU, do not perform memory write, BREAKPOINT setting, or
downloading.
Cache operation during user program break:
When cache is enabled in the device incorporating a cache, the emulator accesses the
memory by the following methods:
• At memory write: Writes through the cache, then writes to the memory or uses the
OCBWB instruction.
• At memory read: Does not change the cache write mode that has been set.
• At memory verify: Disables the cache for verification read.
Therefore, when memory read or write is performed during user program break, the
cache state will be changed.
In some devices to be debugged, the emulator accesses the memory by the following
methods:
• At memory write: Writes to the cache, then issues an external single write. The
LRU is not updated.
• At memory read: Reads memory from the cache. The LRU is not updated.